1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iommu/apple,dart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple DART IOMMU
8
9maintainers:
10  - Sven Peter <sven@svenpeter.dev>
11
12description: |+
13  Apple SoCs may contain an implementation of their Device Address
14  Resolution Table which provides a mandatory layer of address
15  translations for various masters.
16
17  Each DART instance is capable of handling up to 16 different streams
18  with individual pagetables and page-level read/write protection flags.
19
20  This DART IOMMU also raises interrupts in response to various
21  fault conditions.
22
23properties:
24  compatible:
25    const: apple,t8103-dart
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    maxItems: 1
32
33  clocks:
34    description:
35      Reference to the gate clock phandle if required for this IOMMU.
36      Optional since not all IOMMUs are attached to a clock gate.
37
38  '#iommu-cells':
39    const: 1
40    description:
41      Has to be one. The single cell describes the stream id emitted by
42      a master to the IOMMU.
43
44required:
45  - compatible
46  - reg
47  - '#iommu-cells'
48  - interrupts
49
50additionalProperties: false
51
52examples:
53  - |+
54    dart1: iommu@82f80000 {
55      compatible = "apple,t8103-dart";
56      reg = <0x82f80000 0x4000>;
57      interrupts = <1 781 4>;
58      #iommu-cells = <1>;
59    };
60
61    master1 {
62      iommus = <&dart1 0>;
63    };
64
65  - |+
66    dart2a: iommu@82f00000 {
67      compatible = "apple,t8103-dart";
68      reg = <0x82f00000 0x4000>;
69      interrupts = <1 781 4>;
70      #iommu-cells = <1>;
71    };
72    dart2b: iommu@82f80000 {
73      compatible = "apple,t8103-dart";
74      reg = <0x82f80000 0x4000>;
75      interrupts = <1 781 4>;
76      #iommu-cells = <1>;
77    };
78
79    master2 {
80      iommus = <&dart2a 0>, <&dart2b 1>;
81    };
82