119f92b23STony LindgrenOmap2/3 intc controller 219f92b23STony Lindgren 319f92b23STony LindgrenOn TI omap2 and 3 the intc interrupt controller can provide 419f92b23STony Lindgren96 or 128 IRQ signals to the ARM host depending on the SoC. 519f92b23STony Lindgren 619f92b23STony LindgrenRequired Properties: 719f92b23STony Lindgren- compatible: should be one of 819f92b23STony Lindgren "ti,omap2-intc" 919f92b23STony Lindgren "ti,omap3-intc" 1019f92b23STony Lindgren "ti,dm814-intc" 1119f92b23STony Lindgren "ti,dm816-intc" 1219f92b23STony Lindgren "ti,am33xx-intc" 1319f92b23STony Lindgren 1419f92b23STony Lindgren- interrupt-controller : Identifies the node as an interrupt controller 1519f92b23STony Lindgren- #interrupt-cells : Specifies the number of cells needed to encode interrupt 1619f92b23STony Lindgren source, should be 1 for intc 1719f92b23STony Lindgren- interrupts: interrupt reference to primary interrupt controller 1819f92b23STony Lindgren 1919f92b23STony LindgrenPlease refer to interrupts.txt in this directory for details of the common 2019f92b23STony LindgrenInterrupt Controllers bindings used by client devices. 2119f92b23STony Lindgren 2219f92b23STony LindgrenExample: 2319f92b23STony Lindgren intc: interrupt-controller@48200000 { 2419f92b23STony Lindgren compatible = "ti,omap3-intc"; 2519f92b23STony Lindgren interrupt-controller; 2619f92b23STony Lindgren #interrupt-cells = <1>; 2719f92b23STony Lindgren reg = <0x48200000 0x1000>; 2819f92b23STony Lindgren }; 29