1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - renesas,irqc-r8a73a4        # R-Mobile APE6
17          - renesas,irqc-r8a7743        # RZ/G1M
18          - renesas,irqc-r8a7744        # RZ/G1N
19          - renesas,irqc-r8a7745        # RZ/G1E
20          - renesas,irqc-r8a77470       # RZ/G1C
21          - renesas,irqc-r8a7790        # R-Car H2
22          - renesas,irqc-r8a7791        # R-Car M2-W
23          - renesas,irqc-r8a7792        # R-Car V2H
24          - renesas,irqc-r8a7793        # R-Car M2-N
25          - renesas,irqc-r8a7794        # R-Car E2
26          - renesas,intc-ex-r8a774a1    # RZ/G2M
27          - renesas,intc-ex-r8a774c0    # RZ/G2E
28          - renesas,intc-ex-r8a7795     # R-Car H3
29          - renesas,intc-ex-r8a7796     # R-Car M3-W
30          - renesas,intc-ex-r8a77965    # R-Car M3-N
31          - renesas,intc-ex-r8a77970    # R-Car V3M
32          - renesas,intc-ex-r8a77980    # R-Car V3H
33          - renesas,intc-ex-r8a77990    # R-Car E3
34          - renesas,intc-ex-r8a77995    # R-Car D3
35      - const: renesas,irqc
36
37  '#interrupt-cells':
38    # an interrupt index and flags, as defined in interrupts.txt in
39    # this directory
40    const: 2
41
42  interrupt-controller: true
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    minItems: 1
49    maxItems: 32
50
51  clocks:
52    maxItems: 1
53
54  power-domains:
55    maxItems: 1
56
57  resets:
58    maxItems: 1
59
60required:
61  - compatible
62  - '#interrupt-cells'
63  - interrupt-controller
64  - reg
65  - interrupts
66  - clocks
67
68additionalProperties: false
69
70examples:
71  - |
72    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
73    #include <dt-bindings/interrupt-controller/arm-gic.h>
74    #include <dt-bindings/interrupt-controller/irq.h>
75
76    irqc0: interrupt-controller@e61c0000 {
77        compatible = "renesas,irqc-r8a7790", "renesas,irqc";
78        #interrupt-cells = <2>;
79        interrupt-controller;
80        reg = <0 0xe61c0000 0 0x200>;
81        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
82                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
83                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
84                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
85        clocks = <&cpg CPG_MOD 407>;
86    };
87