1+Mediatek MT65xx/MT67xx/MT81xx sysirq
2
3Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI
4interrupt.
5
6Required properties:
7- compatible: should be
8	"mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173
9	"mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135
10	"mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
11	"mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
12	"mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
13	"mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
14	"mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755
15	"mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592
16	"mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589
17	"mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582
18	"mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580
19	"mediatek,mt6577-sysirq": for MT6577
20	"mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701
21- interrupt-controller : Identifies the node as an interrupt controller
22- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
23- interrupt-parent: phandle of irq parent for sysirq. The parent must
24  use the same interrupt-cells format as GIC.
25- reg: Physical base address of the intpol registers and length of memory
26  mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
27  need 1.
28
29Example:
30	sysirq: intpol-controller@10200620 {
31		compatible = "mediatek,mt6797-sysirq",
32			     "mediatek,mt6577-sysirq";
33		interrupt-controller;
34		#interrupt-cells = <3>;
35		interrupt-parent = <&gic>;
36		reg = <0 0x10220620 0 0x20>,
37		      <0 0x10220690 0 0x10>;
38	};
39