1 2* Marvell ODMI for MSI support 3 4Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller 5which can be used by on-board peripheral for MSI interrupts. 6 7Required properties: 8 9- compatible : The value here should contain "marvell,odmi-controller". 10 11- interrupt,controller : Identifies the node as an interrupt controller. 12 13- msi-controller : Identifies the node as an MSI controller. 14 15- marvell,odmi-frames : Number of ODMI frames available. Each frame 16 provides a number of events. 17 18- reg : List of register definitions, one for each 19 ODMI frame. 20 21- marvell,spi-base : List of GIC base SPI interrupts, one for each 22 ODMI frame. Those SPI interrupts are 0-based, 23 i.e marvell,spi-base = <128> will use SPI #96. 24 See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt 25 for details about the GIC Device Tree binding. 26 27- interrupt-parent : Reference to the parent interrupt controller. 28 29Example: 30 31 odmi: odmi@300000 { 32 compatible = "marvell,odmi-controller"; 33 interrupt-controller; 34 msi-controller; 35 marvell,odmi-frames = <4>; 36 reg = <0x300000 0x4000>, 37 <0x304000 0x4000>, 38 <0x308000 0x4000>, 39 <0x30C000 0x4000>; 40 marvell,spi-base = <128>, <136>, <144>, <152>; 41 }; 42