xref: /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt (revision dfab9954)

* Marvell ODMI for MSI support

Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller
which can be used by on-board peripheral for MSI interrupts.

Required properties:

- compatible           : The value here should contain:

    "marvell,ap806-odmi-controller", "marvell,odmi-controller".

- interrupt,controller : Identifies the node as an interrupt controller.

- msi-controller       : Identifies the node as an MSI controller.

- marvell,odmi-frames  : Number of ODMI frames available. Each frame
                         provides a number of events.

- reg                  : List of register definitions, one for each
                         ODMI frame.

- marvell,spi-base     : List of GIC base SPI interrupts, one for each
                         ODMI frame. Those SPI interrupts are 0-based,
                         i.e marvell,spi-base = <128> will use SPI #96.
                         See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
                         for details about the GIC Device Tree binding.

Example:

	odmi: odmi@300000 {
		compatible = "marvell,ap806-odmi-controller",
			     "marvell,odmi-controller";
		interrupt-controller;
		msi-controller;
		marvell,odmi-frames = <4>;
		reg = <0x300000 0x4000>,
		      <0x304000 0x4000>,
		      <0x308000 0x4000>,
		      <0x30C000 0x4000>;
		marvell,spi-base = <128>, <136>, <144>, <152>;
	};