1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Interconnect Bandwidth Monitor 8 9maintainers: 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 11 12description: | 13 Bandwidth Monitor measures current throughput on buses between various NoC 14 fabrics and provides information when it crosses configured thresholds. 15 16 Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845:: 17 - Measuring the bandwidth between CPUs and Last Level Cache Controller - 18 called just BWMON, 19 - Measuring the bandwidth between Last Level Cache Controller and memory 20 (DDR) - called LLCC BWMON. 21 22properties: 23 compatible: 24 oneOf: 25 - const: qcom,msm8998-bwmon # BWMON v4 26 - items: 27 - enum: 28 - qcom,sc7280-cpu-bwmon 29 - qcom,sc8280xp-cpu-bwmon 30 - qcom,sdm845-cpu-bwmon 31 - qcom,sm8550-cpu-bwmon 32 - const: qcom,sdm845-bwmon # BWMON v4, unified register space 33 - items: 34 - enum: 35 - qcom,sc8280xp-llcc-bwmon 36 - qcom,sm8550-llcc-bwmon 37 - const: qcom,sc7280-llcc-bwmon 38 - const: qcom,sc7280-llcc-bwmon # BWMON v5 39 - const: qcom,sdm845-llcc-bwmon # BWMON v5 40 41 interconnects: 42 maxItems: 1 43 44 interrupts: 45 maxItems: 1 46 47 operating-points-v2: true 48 opp-table: 49 type: object 50 51 reg: 52 # BWMON v5 uses one register address space, v1-v4 use one or two. 53 minItems: 1 54 maxItems: 2 55 56 reg-names: 57 minItems: 1 58 maxItems: 2 59 60required: 61 - compatible 62 - interconnects 63 - interrupts 64 - operating-points-v2 65 - opp-table 66 - reg 67 68additionalProperties: false 69 70allOf: 71 - if: 72 properties: 73 compatible: 74 const: qcom,msm8998-bwmon 75 then: 76 properties: 77 reg: 78 minItems: 2 79 80 reg-names: 81 items: 82 - const: monitor 83 - const: global 84 85 else: 86 properties: 87 reg: 88 maxItems: 1 89 90 reg-names: 91 maxItems: 1 92 93examples: 94 - | 95 #include <dt-bindings/interconnect/qcom,sdm845.h> 96 #include <dt-bindings/interrupt-controller/arm-gic.h> 97 98 pmu@1436400 { 99 compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon"; 100 reg = <0x01436400 0x600>; 101 interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; 102 interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>; 103 104 operating-points-v2 = <&cpu_bwmon_opp_table>; 105 106 cpu_bwmon_opp_table: opp-table { 107 compatible = "operating-points-v2"; 108 opp-0 { 109 opp-peak-kBps = <4800000>; 110 }; 111 opp-1 { 112 opp-peak-kBps = <9216000>; 113 }; 114 opp-2 { 115 opp-peak-kBps = <15052800>; 116 }; 117 opp-3 { 118 opp-peak-kBps = <20889600>; 119 }; 120 opp-4 { 121 opp-peak-kBps = <25497600>; 122 }; 123 }; 124 }; 125