1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPMh Network-On-Chip Interconnect 8 9maintainers: 10 - Georgi Djakov <georgi.djakov@linaro.org> 11 - Odelu Kukatla <okukatla@codeaurora.org> 12 13description: | 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 16 able to communicate with the BCM through the Resource State Coordinator (RSC) 17 associated with each execution environment. Provider nodes must point to at 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 20 21allOf: 22 - $ref: qcom,rpmh-common.yaml# 23 24properties: 25 reg: 26 maxItems: 1 27 28 compatible: 29 enum: 30 - qcom,sc7180-aggre1-noc 31 - qcom,sc7180-aggre2-noc 32 - qcom,sc7180-camnoc-virt 33 - qcom,sc7180-compute-noc 34 - qcom,sc7180-config-noc 35 - qcom,sc7180-dc-noc 36 - qcom,sc7180-gem-noc 37 - qcom,sc7180-mc-virt 38 - qcom,sc7180-mmss-noc 39 - qcom,sc7180-npu-noc 40 - qcom,sc7180-qup-virt 41 - qcom,sc7180-system-noc 42 - qcom,sc8180x-aggre1-noc 43 - qcom,sc8180x-aggre2-noc 44 - qcom,sc8180x-camnoc-virt 45 - qcom,sc8180x-compute-noc 46 - qcom,sc8180x-config-noc 47 - qcom,sc8180x-dc-noc 48 - qcom,sc8180x-gem-noc 49 - qcom,sc8180x-ipa-virt 50 - qcom,sc8180x-mc-virt 51 - qcom,sc8180x-mmss-noc 52 - qcom,sc8180x-qup-virt 53 - qcom,sc8180x-system-noc 54 - qcom,sdm845-aggre1-noc 55 - qcom,sdm845-aggre2-noc 56 - qcom,sdm845-config-noc 57 - qcom,sdm845-dc-noc 58 - qcom,sdm845-gladiator-noc 59 - qcom,sdm845-mem-noc 60 - qcom,sdm845-mmss-noc 61 - qcom,sdm845-system-noc 62 - qcom,sdx55-mc-virt 63 - qcom,sdx55-mem-noc 64 - qcom,sdx55-system-noc 65 - qcom,sdx65-mc-virt 66 - qcom,sdx65-mem-noc 67 - qcom,sdx65-system-noc 68 - qcom,sm8150-aggre1-noc 69 - qcom,sm8150-aggre2-noc 70 - qcom,sm8150-camnoc-noc 71 - qcom,sm8150-compute-noc 72 - qcom,sm8150-config-noc 73 - qcom,sm8150-dc-noc 74 - qcom,sm8150-gem-noc 75 - qcom,sm8150-ipa-virt 76 - qcom,sm8150-mc-virt 77 - qcom,sm8150-mmss-noc 78 - qcom,sm8150-system-noc 79 - qcom,sm8250-aggre1-noc 80 - qcom,sm8250-aggre2-noc 81 - qcom,sm8250-compute-noc 82 - qcom,sm8250-config-noc 83 - qcom,sm8250-dc-noc 84 - qcom,sm8250-gem-noc 85 - qcom,sm8250-ipa-virt 86 - qcom,sm8250-mc-virt 87 - qcom,sm8250-mmss-noc 88 - qcom,sm8250-npu-noc 89 - qcom,sm8250-system-noc 90 - qcom,sm8350-aggre1-noc 91 - qcom,sm8350-aggre2-noc 92 - qcom,sm8350-config-noc 93 - qcom,sm8350-dc-noc 94 - qcom,sm8350-gem-noc 95 - qcom,sm8350-lpass-ag-noc 96 - qcom,sm8350-mc-virt 97 - qcom,sm8350-mmss-noc 98 - qcom,sm8350-compute-noc 99 - qcom,sm8350-system-noc 100 101 '#interconnect-cells': true 102 103required: 104 - compatible 105 - reg 106 107unevaluatedProperties: false 108 109examples: 110 - | 111 #include <dt-bindings/interconnect/qcom,sdm845.h> 112 113 mem_noc: interconnect@1380000 { 114 compatible = "qcom,sdm845-mem-noc"; 115 reg = <0x01380000 0x27200>; 116 #interconnect-cells = <1>; 117 qcom,bcm-voters = <&apps_bcm_voter>; 118 }; 119 120 mmss_noc: interconnect@1740000 { 121 compatible = "qcom,sdm845-mmss-noc"; 122 reg = <0x01740000 0x1c1000>; 123 #interconnect-cells = <1>; 124 qcom,bcm-voter-names = "apps", "disp"; 125 qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; 126 }; 127