1*39dd2d1eSAnand Ashok Dumbre# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*39dd2d1eSAnand Ashok Dumbre%YAML 1.2
3*39dd2d1eSAnand Ashok Dumbre---
4*39dd2d1eSAnand Ashok Dumbre$id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
5*39dd2d1eSAnand Ashok Dumbre$schema: http://devicetree.org/meta-schemas/core.yaml#
6*39dd2d1eSAnand Ashok Dumbre
7*39dd2d1eSAnand Ashok Dumbretitle: Xilinx Zynq Ultrascale AMS controller
8*39dd2d1eSAnand Ashok Dumbre
9*39dd2d1eSAnand Ashok Dumbremaintainers:
10*39dd2d1eSAnand Ashok Dumbre  - Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
11*39dd2d1eSAnand Ashok Dumbre
12*39dd2d1eSAnand Ashok Dumbredescription: |
13*39dd2d1eSAnand Ashok Dumbre  The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
14*39dd2d1eSAnand Ashok Dumbre  that can be used to sample external voltages and monitor on-die operating
15*39dd2d1eSAnand Ashok Dumbre  conditions, such as temperature and supply voltage levels.
16*39dd2d1eSAnand Ashok Dumbre  The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
17*39dd2d1eSAnand Ashok Dumbre  PS (Processing System) SYSMON.
18*39dd2d1eSAnand Ashok Dumbre  All designs should have AMS registers, but PS and PL are optional. The
19*39dd2d1eSAnand Ashok Dumbre  AMS controller can work with only PS, only PL and both PS and PL
20*39dd2d1eSAnand Ashok Dumbre  configurations. Please specify registers according to your design. Devicetree
21*39dd2d1eSAnand Ashok Dumbre  should always have AMS module property. Providing PS & PL module is optional.
22*39dd2d1eSAnand Ashok Dumbre
23*39dd2d1eSAnand Ashok Dumbre  AMS Channel Details
24*39dd2d1eSAnand Ashok Dumbre  ```````````````````
25*39dd2d1eSAnand Ashok Dumbre  Sysmon Block  |Channel|                       Details                                 |Measurement
26*39dd2d1eSAnand Ashok Dumbre                |Number |                                                               |Type
27*39dd2d1eSAnand Ashok Dumbre  ---------------------------------------------------------------------------------------------------------
28*39dd2d1eSAnand Ashok Dumbre  AMS CTRL      |0      |System PLLs voltage measurement, VCC_PSPLL.                    |Voltage
29*39dd2d1eSAnand Ashok Dumbre                |1      |Battery voltage measurement, VCC_PSBATT.                       |Voltage
30*39dd2d1eSAnand Ashok Dumbre                |2      |PL Internal voltage measurement, VCCINT.                       |Voltage
31*39dd2d1eSAnand Ashok Dumbre                |3      |Block RAM voltage measurement, VCCBRAM.                        |Voltage
32*39dd2d1eSAnand Ashok Dumbre                |4      |PL Aux voltage measurement, VCCAUX.                            |Voltage
33*39dd2d1eSAnand Ashok Dumbre                |5      |Voltage measurement for six DDR I/O PLLs, VCC_PSDDR_PLL.       |Voltage
34*39dd2d1eSAnand Ashok Dumbre                |6      |VCC_PSINTFP_DDR voltage measurement.                           |Voltage
35*39dd2d1eSAnand Ashok Dumbre  ---------------------------------------------------------------------------------------------------------
36*39dd2d1eSAnand Ashok Dumbre  PS Sysmon     |7      |LPD temperature measurement.                                   |Temperature
37*39dd2d1eSAnand Ashok Dumbre                |8      |FPD temperature measurement (REMOTE).                          |Temperature
38*39dd2d1eSAnand Ashok Dumbre                |9      |VCC PS LPD voltage measurement (supply1).                      |Voltage
39*39dd2d1eSAnand Ashok Dumbre                |10     |VCC PS FPD voltage measurement (supply2).                      |Voltage
40*39dd2d1eSAnand Ashok Dumbre                |11     |PS Aux voltage reference (supply3).                            |Voltage
41*39dd2d1eSAnand Ashok Dumbre                |12     |DDR I/O VCC voltage measurement.                               |Voltage
42*39dd2d1eSAnand Ashok Dumbre                |13     |PS IO Bank 503 voltage measurement (supply5).                  |Voltage
43*39dd2d1eSAnand Ashok Dumbre                |14     |PS IO Bank 500 voltage measurement (supply6).                  |Voltage
44*39dd2d1eSAnand Ashok Dumbre                |15     |VCCO_PSIO1 voltage measurement.                                |Voltage
45*39dd2d1eSAnand Ashok Dumbre                |16     |VCCO_PSIO2 voltage measurement.                                |Voltage
46*39dd2d1eSAnand Ashok Dumbre                |17     |VCC_PS_GTR voltage measurement (VPS_MGTRAVCC).                 |Voltage
47*39dd2d1eSAnand Ashok Dumbre                |18     |VTT_PS_GTR voltage measurement (VPS_MGTRAVTT).                 |Voltage
48*39dd2d1eSAnand Ashok Dumbre                |19     |VCC_PSADC voltage measurement.                                 |Voltage
49*39dd2d1eSAnand Ashok Dumbre  ---------------------------------------------------------------------------------------------------------
50*39dd2d1eSAnand Ashok Dumbre  PL Sysmon     |20     |PL temperature measurement.                                    |Temperature
51*39dd2d1eSAnand Ashok Dumbre                |21     |PL Internal voltage measurement, VCCINT.                       |Voltage
52*39dd2d1eSAnand Ashok Dumbre                |22     |PL Auxiliary voltage measurement, VCCAUX.                      |Voltage
53*39dd2d1eSAnand Ashok Dumbre                |23     |ADC Reference P+ voltage measurement.                          |Voltage
54*39dd2d1eSAnand Ashok Dumbre                |24     |ADC Reference N- voltage measurement.                          |Voltage
55*39dd2d1eSAnand Ashok Dumbre                |25     |PL Block RAM voltage measurement, VCCBRAM.                     |Voltage
56*39dd2d1eSAnand Ashok Dumbre                |26     |LPD Internal voltage measurement, VCC_PSINTLP (supply4).       |Voltage
57*39dd2d1eSAnand Ashok Dumbre                |27     |FPD Internal voltage measurement, VCC_PSINTFP (supply5).       |Voltage
58*39dd2d1eSAnand Ashok Dumbre                |28     |PS Auxiliary voltage measurement (supply6).                    |Voltage
59*39dd2d1eSAnand Ashok Dumbre                |29     |PL VCCADC voltage measurement (vccams).                        |Voltage
60*39dd2d1eSAnand Ashok Dumbre                |30     |Differential analog input signal voltage measurment.           |Voltage
61*39dd2d1eSAnand Ashok Dumbre                |31     |VUser0 voltage measurement (supply7).                          |Voltage
62*39dd2d1eSAnand Ashok Dumbre                |32     |VUser1 voltage measurement (supply8).                          |Voltage
63*39dd2d1eSAnand Ashok Dumbre                |33     |VUser2 voltage measurement (supply9).                          |Voltage
64*39dd2d1eSAnand Ashok Dumbre                |34     |VUser3 voltage measurement (supply10).                         |Voltage
65*39dd2d1eSAnand Ashok Dumbre                |35     |Auxiliary ch 0 voltage measurement (VAux0).                    |Voltage
66*39dd2d1eSAnand Ashok Dumbre                |36     |Auxiliary ch 1 voltage measurement (VAux1).                    |Voltage
67*39dd2d1eSAnand Ashok Dumbre                |37     |Auxiliary ch 2 voltage measurement (VAux2).                    |Voltage
68*39dd2d1eSAnand Ashok Dumbre                |38     |Auxiliary ch 3 voltage measurement (VAux3).                    |Voltage
69*39dd2d1eSAnand Ashok Dumbre                |39     |Auxiliary ch 4 voltage measurement (VAux4).                    |Voltage
70*39dd2d1eSAnand Ashok Dumbre                |40     |Auxiliary ch 5 voltage measurement (VAux5).                    |Voltage
71*39dd2d1eSAnand Ashok Dumbre                |41     |Auxiliary ch 6 voltage measurement (VAux6).                    |Voltage
72*39dd2d1eSAnand Ashok Dumbre                |42     |Auxiliary ch 7 voltage measurement (VAux7).                    |Voltage
73*39dd2d1eSAnand Ashok Dumbre                |43     |Auxiliary ch 8 voltage measurement (VAux8).                    |Voltage
74*39dd2d1eSAnand Ashok Dumbre                |44     |Auxiliary ch 9 voltage measurement (VAux9).                    |Voltage
75*39dd2d1eSAnand Ashok Dumbre                |45     |Auxiliary ch 10 voltage measurement (VAux10).                  |Voltage
76*39dd2d1eSAnand Ashok Dumbre                |46     |Auxiliary ch 11 voltage measurement (VAux11).                  |Voltage
77*39dd2d1eSAnand Ashok Dumbre                |47     |Auxiliary ch 12 voltage measurement (VAux12).                  |Voltage
78*39dd2d1eSAnand Ashok Dumbre                |48     |Auxiliary ch 13 voltage measurement (VAux13).                  |Voltage
79*39dd2d1eSAnand Ashok Dumbre                |49     |Auxiliary ch 14 voltage measurement (VAux14).                  |Voltage
80*39dd2d1eSAnand Ashok Dumbre                |50     |Auxiliary ch 15 voltage measurement (VAux15).                  |Voltage
81*39dd2d1eSAnand Ashok Dumbre  --------------------------------------------------------------------------------------------------------
82*39dd2d1eSAnand Ashok Dumbre
83*39dd2d1eSAnand Ashok Dumbreproperties:
84*39dd2d1eSAnand Ashok Dumbre  compatible:
85*39dd2d1eSAnand Ashok Dumbre    enum:
86*39dd2d1eSAnand Ashok Dumbre      - xlnx,zynqmp-ams
87*39dd2d1eSAnand Ashok Dumbre
88*39dd2d1eSAnand Ashok Dumbre  interrupts:
89*39dd2d1eSAnand Ashok Dumbre    maxItems: 1
90*39dd2d1eSAnand Ashok Dumbre
91*39dd2d1eSAnand Ashok Dumbre  reg:
92*39dd2d1eSAnand Ashok Dumbre    description: AMS Controller register space
93*39dd2d1eSAnand Ashok Dumbre    maxItems: 1
94*39dd2d1eSAnand Ashok Dumbre
95*39dd2d1eSAnand Ashok Dumbre  ranges:
96*39dd2d1eSAnand Ashok Dumbre    description:
97*39dd2d1eSAnand Ashok Dumbre      Maps the child address space for PS and/or PL.
98*39dd2d1eSAnand Ashok Dumbre    maxItems: 1
99*39dd2d1eSAnand Ashok Dumbre
100*39dd2d1eSAnand Ashok Dumbre  '#address-cells':
101*39dd2d1eSAnand Ashok Dumbre    const: 1
102*39dd2d1eSAnand Ashok Dumbre
103*39dd2d1eSAnand Ashok Dumbre  '#size-cells':
104*39dd2d1eSAnand Ashok Dumbre    const: 1
105*39dd2d1eSAnand Ashok Dumbre
106*39dd2d1eSAnand Ashok Dumbre  '#io-channel-cells':
107*39dd2d1eSAnand Ashok Dumbre    const: 1
108*39dd2d1eSAnand Ashok Dumbre
109*39dd2d1eSAnand Ashok Dumbre  ams-ps@0:
110*39dd2d1eSAnand Ashok Dumbre    type: object
111*39dd2d1eSAnand Ashok Dumbre    description: |
112*39dd2d1eSAnand Ashok Dumbre      PS (Processing System) SYSMON is memory mapped to PS. This block has
113*39dd2d1eSAnand Ashok Dumbre      built-in alarm generation logic that is used to interrupt the processor
114*39dd2d1eSAnand Ashok Dumbre      based on condition set.
115*39dd2d1eSAnand Ashok Dumbre
116*39dd2d1eSAnand Ashok Dumbre    properties:
117*39dd2d1eSAnand Ashok Dumbre      compatible:
118*39dd2d1eSAnand Ashok Dumbre        enum:
119*39dd2d1eSAnand Ashok Dumbre          - xlnx,zynqmp-ams-ps
120*39dd2d1eSAnand Ashok Dumbre
121*39dd2d1eSAnand Ashok Dumbre      reg:
122*39dd2d1eSAnand Ashok Dumbre        description: Register Space for PS-SYSMON
123*39dd2d1eSAnand Ashok Dumbre        maxItems: 1
124*39dd2d1eSAnand Ashok Dumbre
125*39dd2d1eSAnand Ashok Dumbre    required:
126*39dd2d1eSAnand Ashok Dumbre      - compatible
127*39dd2d1eSAnand Ashok Dumbre      - reg
128*39dd2d1eSAnand Ashok Dumbre
129*39dd2d1eSAnand Ashok Dumbre    additionalProperties: false
130*39dd2d1eSAnand Ashok Dumbre
131*39dd2d1eSAnand Ashok Dumbre  ams-pl@400:
132*39dd2d1eSAnand Ashok Dumbre    type: object
133*39dd2d1eSAnand Ashok Dumbre    description:
134*39dd2d1eSAnand Ashok Dumbre      PL-SYSMON is capable of monitoring off chip voltage and temperature.
135*39dd2d1eSAnand Ashok Dumbre      PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
136*39dd2d1eSAnand Ashok Dumbre      from external master. Out of this interface currently only DRP is
137*39dd2d1eSAnand Ashok Dumbre      supported. This block has alarm generation logic that is used to
138*39dd2d1eSAnand Ashok Dumbre      interrupt the processor based on condition set.
139*39dd2d1eSAnand Ashok Dumbre
140*39dd2d1eSAnand Ashok Dumbre    properties:
141*39dd2d1eSAnand Ashok Dumbre      compatible:
142*39dd2d1eSAnand Ashok Dumbre        items:
143*39dd2d1eSAnand Ashok Dumbre          - enum:
144*39dd2d1eSAnand Ashok Dumbre              - xlnx,zynqmp-ams-pl
145*39dd2d1eSAnand Ashok Dumbre
146*39dd2d1eSAnand Ashok Dumbre      reg:
147*39dd2d1eSAnand Ashok Dumbre        description: Register Space for PL-SYSMON.
148*39dd2d1eSAnand Ashok Dumbre        maxItems: 1
149*39dd2d1eSAnand Ashok Dumbre
150*39dd2d1eSAnand Ashok Dumbre      '#address-cells':
151*39dd2d1eSAnand Ashok Dumbre        const: 1
152*39dd2d1eSAnand Ashok Dumbre
153*39dd2d1eSAnand Ashok Dumbre      '#size-cells':
154*39dd2d1eSAnand Ashok Dumbre        const: 0
155*39dd2d1eSAnand Ashok Dumbre
156*39dd2d1eSAnand Ashok Dumbre    patternProperties:
157*39dd2d1eSAnand Ashok Dumbre      "^channel@([2-4][0-9]|50)$":
158*39dd2d1eSAnand Ashok Dumbre        type: object
159*39dd2d1eSAnand Ashok Dumbre        description:
160*39dd2d1eSAnand Ashok Dumbre          Describes the external channels connected.
161*39dd2d1eSAnand Ashok Dumbre
162*39dd2d1eSAnand Ashok Dumbre        properties:
163*39dd2d1eSAnand Ashok Dumbre          reg:
164*39dd2d1eSAnand Ashok Dumbre            description:
165*39dd2d1eSAnand Ashok Dumbre              Pair of pins the channel is connected to. This value is
166*39dd2d1eSAnand Ashok Dumbre              same as Channel Number for a particular channel.
167*39dd2d1eSAnand Ashok Dumbre            minimum: 20
168*39dd2d1eSAnand Ashok Dumbre            maximum: 50
169*39dd2d1eSAnand Ashok Dumbre
170*39dd2d1eSAnand Ashok Dumbre          xlnx,bipolar:
171*39dd2d1eSAnand Ashok Dumbre            $ref: /schemas/types.yaml#/definitions/flag
172*39dd2d1eSAnand Ashok Dumbre            type: boolean
173*39dd2d1eSAnand Ashok Dumbre            description:
174*39dd2d1eSAnand Ashok Dumbre              If the set channel is used in bipolar mode.
175*39dd2d1eSAnand Ashok Dumbre
176*39dd2d1eSAnand Ashok Dumbre        required:
177*39dd2d1eSAnand Ashok Dumbre          - reg
178*39dd2d1eSAnand Ashok Dumbre
179*39dd2d1eSAnand Ashok Dumbre        additionalProperties: false
180*39dd2d1eSAnand Ashok Dumbre
181*39dd2d1eSAnand Ashok Dumbrerequired:
182*39dd2d1eSAnand Ashok Dumbre  - compatible
183*39dd2d1eSAnand Ashok Dumbre  - reg
184*39dd2d1eSAnand Ashok Dumbre  - ranges
185*39dd2d1eSAnand Ashok Dumbre
186*39dd2d1eSAnand Ashok DumbreadditionalProperties: false
187*39dd2d1eSAnand Ashok Dumbre
188*39dd2d1eSAnand Ashok Dumbreexamples:
189*39dd2d1eSAnand Ashok Dumbre  - |
190*39dd2d1eSAnand Ashok Dumbre    bus {
191*39dd2d1eSAnand Ashok Dumbre        #address-cells = <2>;
192*39dd2d1eSAnand Ashok Dumbre        #size-cells = <2>;
193*39dd2d1eSAnand Ashok Dumbre
194*39dd2d1eSAnand Ashok Dumbre        xilinx_ams: ams@ffa50000 {
195*39dd2d1eSAnand Ashok Dumbre            compatible = "xlnx,zynqmp-ams";
196*39dd2d1eSAnand Ashok Dumbre            interrupt-parent = <&gic>;
197*39dd2d1eSAnand Ashok Dumbre            interrupts = <0 56 4>;
198*39dd2d1eSAnand Ashok Dumbre            reg = <0x0 0xffa50000 0x0 0x800>;
199*39dd2d1eSAnand Ashok Dumbre            #address-cells = <1>;
200*39dd2d1eSAnand Ashok Dumbre            #size-cells = <1>;
201*39dd2d1eSAnand Ashok Dumbre            #io-channel-cells = <1>;
202*39dd2d1eSAnand Ashok Dumbre            ranges = <0 0 0xffa50800 0x800>;
203*39dd2d1eSAnand Ashok Dumbre
204*39dd2d1eSAnand Ashok Dumbre            ams_ps: ams-ps@0 {
205*39dd2d1eSAnand Ashok Dumbre                compatible = "xlnx,zynqmp-ams-ps";
206*39dd2d1eSAnand Ashok Dumbre                reg = <0 0x400>;
207*39dd2d1eSAnand Ashok Dumbre            };
208*39dd2d1eSAnand Ashok Dumbre
209*39dd2d1eSAnand Ashok Dumbre            ams_pl: ams-pl@400 {
210*39dd2d1eSAnand Ashok Dumbre                compatible = "xlnx,zynqmp-ams-pl";
211*39dd2d1eSAnand Ashok Dumbre                reg = <0x400 0x400>;
212*39dd2d1eSAnand Ashok Dumbre                #address-cells = <1>;
213*39dd2d1eSAnand Ashok Dumbre                #size-cells = <0>;
214*39dd2d1eSAnand Ashok Dumbre                channel@30 {
215*39dd2d1eSAnand Ashok Dumbre                    reg = <30>;
216*39dd2d1eSAnand Ashok Dumbre                    xlnx,bipolar;
217*39dd2d1eSAnand Ashok Dumbre                };
218*39dd2d1eSAnand Ashok Dumbre                channel@31 {
219*39dd2d1eSAnand Ashok Dumbre                    reg = <31>;
220*39dd2d1eSAnand Ashok Dumbre                };
221*39dd2d1eSAnand Ashok Dumbre                channel@38 {
222*39dd2d1eSAnand Ashok Dumbre                    reg = <38>;
223*39dd2d1eSAnand Ashok Dumbre                    xlnx,bipolar;
224*39dd2d1eSAnand Ashok Dumbre                };
225*39dd2d1eSAnand Ashok Dumbre            };
226*39dd2d1eSAnand Ashok Dumbre        };
227*39dd2d1eSAnand Ashok Dumbre    };
228