1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip Successive Approximation Register (SAR) A/D Converter
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: rockchip,saradc
16      - const: rockchip,rk3066-tsadc
17      - const: rockchip,rk3399-saradc
18      - items:
19          - enum:
20              - rockchip,px30-saradc
21              - rockchip,rk3308-saradc
22              - rockchip,rk3328-saradc
23              - rockchip,rv1108-saradc
24          - const: rockchip,rk3399-saradc
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    items:
34      - description: converter clock
35      - description: peripheral clock
36
37  clock-names:
38    items:
39      - const: saradc
40      - const: apb_pclk
41
42  resets:
43    maxItems: 1
44
45  reset-names:
46    const: saradc-apb
47
48  vref-supply:
49    description:
50      The regulator supply for the ADC reference voltage.
51
52  "#io-channel-cells":
53    const: 1
54
55required:
56  - compatible
57  - reg
58  - interrupts
59  - clocks
60  - clock-names
61  - vref-supply
62  - "#io-channel-cells"
63
64additionalProperties: false
65
66examples:
67  - |
68    #include <dt-bindings/clock/rk3288-cru.h>
69    #include <dt-bindings/interrupt-controller/arm-gic.h>
70    saradc: saradc@2006c000 {
71      compatible = "rockchip,saradc";
72      reg = <0x2006c000 0x100>;
73      interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
74      clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
75      clock-names = "saradc", "apb_pclk";
76      resets = <&cru SRST_SARADC>;
77      reset-names = "saradc-apb";
78      vref-supply = <&vcc18>;
79      #io-channel-cells = <1>;
80    };
81