1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip Successive Approximation Register (SAR) A/D Converter
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: rockchip,saradc
16      - const: rockchip,rk3066-tsadc
17      - const: rockchip,rk3399-saradc
18      - items:
19          - enum:
20            - rockchip,rk3328-saradc
21            - rockchip,rv1108-saradc
22          - const: rockchip,rk3399-saradc
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    items:
32      - description: converter clock
33      - description: peripheral clock
34
35  clock-names:
36    items:
37      - const: saradc
38      - const: apb_pclk
39
40  resets:
41    maxItems: 1
42
43  reset-names:
44    const: saradc-apb
45
46  vref-supply:
47    description:
48      The regulator supply for the ADC reference voltage.
49
50  "#io-channel-cells":
51    const: 1
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - clocks
58  - clock-names
59  - vref-supply
60  - "#io-channel-cells"
61
62additionalProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/clock/rk3288-cru.h>
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68    saradc: saradc@2006c000 {
69      compatible = "rockchip,saradc";
70      reg = <0x2006c000 0x100>;
71      interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
72      clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
73      clock-names = "saradc", "apb_pclk";
74      resets = <&cru SRST_SARADC>;
75      reset-names = "saradc-apb";
76      vref-supply = <&vcc18>;
77      #io-channel-cells = <1>;
78    };
79