1*8c412458SJonathan Cameron# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*8c412458SJonathan Cameron%YAML 1.2 3*8c412458SJonathan Cameron--- 4*8c412458SJonathan Cameron$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# 5*8c412458SJonathan Cameron$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8c412458SJonathan Cameron 7*8c412458SJonathan Camerontitle: Renesas R-Car GyroADC 8*8c412458SJonathan Cameron 9*8c412458SJonathan Cameronmaintainers: 10*8c412458SJonathan Cameron - Marek Vasut <marek.vasut+renesas@gmail.com> 11*8c412458SJonathan Cameron 12*8c412458SJonathan Camerondescription: | 13*8c412458SJonathan Cameron The GyroADC block is a reduced SPI block with up to 8 chipselect lines, 14*8c412458SJonathan Cameron which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs 15*8c412458SJonathan Cameron are sampled by the GyroADC block in a round-robin fashion and the result 16*8c412458SJonathan Cameron presented in the GyroADC registers. 17*8c412458SJonathan Cameron The ADC bindings should match with that of the devices connected to a 18*8c412458SJonathan Cameron full featured SPI bus. 19*8c412458SJonathan Cameron 20*8c412458SJonathan Cameronproperties: 21*8c412458SJonathan Cameron compatible: 22*8c412458SJonathan Cameron items: 23*8c412458SJonathan Cameron - enum: 24*8c412458SJonathan Cameron - renesas,r8a7791-gyroadc 25*8c412458SJonathan Cameron - renesas,r8a7792-gyroadc 26*8c412458SJonathan Cameron - const: renesas,rcar-gyroadc 27*8c412458SJonathan Cameron 28*8c412458SJonathan Cameron reg: 29*8c412458SJonathan Cameron maxItems: 1 30*8c412458SJonathan Cameron 31*8c412458SJonathan Cameron clocks: 32*8c412458SJonathan Cameron maxItems: 1 33*8c412458SJonathan Cameron 34*8c412458SJonathan Cameron clock-names: 35*8c412458SJonathan Cameron const: fck 36*8c412458SJonathan Cameron 37*8c412458SJonathan Cameron power-domains: true 38*8c412458SJonathan Cameron 39*8c412458SJonathan Cameron resets: true 40*8c412458SJonathan Cameron 41*8c412458SJonathan Cameron "#address-cells": 42*8c412458SJonathan Cameron const: 1 43*8c412458SJonathan Cameron 44*8c412458SJonathan Cameron "#size-cells": 45*8c412458SJonathan Cameron const: 0 46*8c412458SJonathan Cameron 47*8c412458SJonathan CameronadditionalProperties: false 48*8c412458SJonathan Cameron 49*8c412458SJonathan Cameronrequired: 50*8c412458SJonathan Cameron - compatible 51*8c412458SJonathan Cameron - reg 52*8c412458SJonathan Cameron - clocks 53*8c412458SJonathan Cameron - clock-names 54*8c412458SJonathan Cameron - "#address-cells" 55*8c412458SJonathan Cameron - "#size-cells" 56*8c412458SJonathan Cameron 57*8c412458SJonathan CameronpatternProperties: 58*8c412458SJonathan Cameron "@[0-7]$": 59*8c412458SJonathan Cameron type: object 60*8c412458SJonathan Cameron properties: 61*8c412458SJonathan Cameron compatible: 62*8c412458SJonathan Cameron description: | 63*8c412458SJonathan Cameron fujitsu,mb88101a 64*8c412458SJonathan Cameron - Fujitsu MB88101A compatible mode, 65*8c412458SJonathan Cameron 12bit sampling, up to 4 channels can be sampled in round-robin 66*8c412458SJonathan Cameron fashion. One Fujitsu chip supplies four GyroADC channels with 67*8c412458SJonathan Cameron data as it contains four ADCs on the chip and thus for 4-channel 68*8c412458SJonathan Cameron operation, single MB88101A is required. The Cx chipselect lines 69*8c412458SJonathan Cameron of the MB88101A connect directly to two CHS lines of the GyroADC, 70*8c412458SJonathan Cameron no demuxer is required. The data out line of each MB88101A 71*8c412458SJonathan Cameron connects to a shared input pin of the GyroADC. 72*8c412458SJonathan Cameron ti,adcs7476 or ti,adc121 or adi,ad7476 73*8c412458SJonathan Cameron - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit 74*8c412458SJonathan Cameron sampling, up to 8 channels can be sampled in round-robin 75*8c412458SJonathan Cameron fashion. One TI/ADI chip supplies single ADC channel with data, 76*8c412458SJonathan Cameron thus for 8-channel operation, 8 chips are required. 77*8c412458SJonathan Cameron A 3:8 chipselect demuxer is required to connect the nCS line 78*8c412458SJonathan Cameron of the TI/ADI chips to the GyroADC, while MISO line of each 79*8c412458SJonathan Cameron TI/ADI ADC connects to a shared input pin of the GyroADC. 80*8c412458SJonathan Cameron maxim,max1162 or maxim,max11100 81*8c412458SJonathan Cameron - Maxim MAX1162 / Maxim MAX11100 compatible mode, 16bit sampling, 82*8c412458SJonathan Cameron up to 8 channels can be sampled in round-robin fashion. One 83*8c412458SJonathan Cameron Maxim chip supplies single ADC channel with data, thus for 84*8c412458SJonathan Cameron 8-channel operation, 8 chips are required. 85*8c412458SJonathan Cameron A 3:8 chipselect demuxer is required to connect the nCS line 86*8c412458SJonathan Cameron of the MAX chips to the GyroADC, while MISO line of each Maxim 87*8c412458SJonathan Cameron ADC connects to a shared input pin of the GyroADC. 88*8c412458SJonathan Cameron enum: 89*8c412458SJonathan Cameron - adi,7476 90*8c412458SJonathan Cameron - fujitsu,mb88101a 91*8c412458SJonathan Cameron - maxim,max1162 92*8c412458SJonathan Cameron - maxim,max11100 93*8c412458SJonathan Cameron - ti,adcs7476 94*8c412458SJonathan Cameron - ti,adc121 95*8c412458SJonathan Cameron 96*8c412458SJonathan Cameron reg: 97*8c412458SJonathan Cameron minimum: 0 98*8c412458SJonathan Cameron maximum: 7 99*8c412458SJonathan Cameron 100*8c412458SJonathan Cameron vref-supply: true 101*8c412458SJonathan Cameron 102*8c412458SJonathan Cameron additionalProperties: false 103*8c412458SJonathan Cameron 104*8c412458SJonathan Cameron required: 105*8c412458SJonathan Cameron - compatible 106*8c412458SJonathan Cameron - reg 107*8c412458SJonathan Cameron - vref-supply 108*8c412458SJonathan Cameron 109*8c412458SJonathan Cameronexamples: 110*8c412458SJonathan Cameron - | 111*8c412458SJonathan Cameron #include <dt-bindings/clock/r8a7791-clock.h> 112*8c412458SJonathan Cameron #include <dt-bindings/power/r8a7791-sysc.h> 113*8c412458SJonathan Cameron soc { 114*8c412458SJonathan Cameron #address-cells = <2>; 115*8c412458SJonathan Cameron #size-cells = <2>; 116*8c412458SJonathan Cameron 117*8c412458SJonathan Cameron adc@e6e54000 { 118*8c412458SJonathan Cameron compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; 119*8c412458SJonathan Cameron reg = <0 0xe6e54000 0 64>; 120*8c412458SJonathan Cameron clocks = <&mstp9_clks R8A7791_CLK_GYROADC>; 121*8c412458SJonathan Cameron clock-names = "fck"; 122*8c412458SJonathan Cameron power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 123*8c412458SJonathan Cameron 124*8c412458SJonathan Cameron pinctrl-0 = <&adc_pins>; 125*8c412458SJonathan Cameron pinctrl-names = "default"; 126*8c412458SJonathan Cameron 127*8c412458SJonathan Cameron #address-cells = <1>; 128*8c412458SJonathan Cameron #size-cells = <0>; 129*8c412458SJonathan Cameron 130*8c412458SJonathan Cameron adc@0 { 131*8c412458SJonathan Cameron reg = <0>; 132*8c412458SJonathan Cameron compatible = "maxim,max1162"; 133*8c412458SJonathan Cameron vref-supply = <&vref_max1162>; 134*8c412458SJonathan Cameron }; 135*8c412458SJonathan Cameron 136*8c412458SJonathan Cameron adc@1 { 137*8c412458SJonathan Cameron reg = <1>; 138*8c412458SJonathan Cameron compatible = "maxim,max1162"; 139*8c412458SJonathan Cameron vref-supply = <&vref_max1162>; 140*8c412458SJonathan Cameron }; 141*8c412458SJonathan Cameron }; 142*8c412458SJonathan Cameron }; 143*8c412458SJonathan Cameron... 144