13264d9e5SSerge Semin# SPDX-License-Identifier: GPL-2.0-only 23264d9e5SSerge Semin%YAML 1.2 33264d9e5SSerge Semin--- 43264d9e5SSerge Semin$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml# 53264d9e5SSerge Semin$schema: http://devicetree.org/meta-schemas/core.yaml# 63264d9e5SSerge Semin 73264d9e5SSerge Semintitle: Synopsys DesignWare APB I2C Controller 83264d9e5SSerge Semin 93264d9e5SSerge Seminmaintainers: 103264d9e5SSerge Semin - Jarkko Nikula <jarkko.nikula@linux.intel.com> 113264d9e5SSerge Semin 123264d9e5SSerge SeminallOf: 133264d9e5SSerge Semin - $ref: /schemas/i2c/i2c-controller.yaml# 143264d9e5SSerge Semin - if: 153264d9e5SSerge Semin properties: 163264d9e5SSerge Semin compatible: 173264d9e5SSerge Semin not: 183264d9e5SSerge Semin contains: 193264d9e5SSerge Semin const: mscc,ocelot-i2c 203264d9e5SSerge Semin then: 213264d9e5SSerge Semin properties: 223264d9e5SSerge Semin reg: 233264d9e5SSerge Semin maxItems: 1 243264d9e5SSerge Semin 253264d9e5SSerge Seminproperties: 263264d9e5SSerge Semin compatible: 273264d9e5SSerge Semin oneOf: 283264d9e5SSerge Semin - description: Generic Synopsys DesignWare I2C controller 293264d9e5SSerge Semin const: snps,designware-i2c 303264d9e5SSerge Semin - description: Microsemi Ocelot SoCs I2C controller 313264d9e5SSerge Semin items: 323264d9e5SSerge Semin - const: mscc,ocelot-i2c 333264d9e5SSerge Semin - const: snps,designware-i2c 340029d097SSerge Semin - description: Baikal-T1 SoC System I2C controller 350029d097SSerge Semin const: baikal,bt1-sys-i2c 363264d9e5SSerge Semin 373264d9e5SSerge Semin reg: 383264d9e5SSerge Semin minItems: 1 393264d9e5SSerge Semin items: 403264d9e5SSerge Semin - description: DW APB I2C controller memory mapped registers 413264d9e5SSerge Semin - description: | 423264d9e5SSerge Semin ICPU_CFG:TWI_DELAY registers to setup the SDA hold time. 433264d9e5SSerge Semin This registers are specific to the Ocelot I2C-controller. 443264d9e5SSerge Semin 453264d9e5SSerge Semin interrupts: 463264d9e5SSerge Semin maxItems: 1 473264d9e5SSerge Semin 483264d9e5SSerge Semin clocks: 493264d9e5SSerge Semin minItems: 1 503264d9e5SSerge Semin items: 513264d9e5SSerge Semin - description: I2C controller reference clock source 523264d9e5SSerge Semin - description: APB interface clock source 533264d9e5SSerge Semin 543264d9e5SSerge Semin clock-names: 553264d9e5SSerge Semin minItems: 1 563264d9e5SSerge Semin items: 573264d9e5SSerge Semin - const: ref 583264d9e5SSerge Semin - const: pclk 593264d9e5SSerge Semin 603264d9e5SSerge Semin resets: 613264d9e5SSerge Semin maxItems: 1 623264d9e5SSerge Semin 633264d9e5SSerge Semin clock-frequency: 643264d9e5SSerge Semin description: Desired I2C bus clock frequency in Hz 653264d9e5SSerge Semin enum: [100000, 400000, 1000000, 3400000] 663264d9e5SSerge Semin default: 400000 673264d9e5SSerge Semin 683264d9e5SSerge Semin i2c-sda-hold-time-ns: 693264d9e5SSerge Semin maxItems: 1 703264d9e5SSerge Semin description: | 713264d9e5SSerge Semin The property should contain the SDA hold time in nanoseconds. This option 723264d9e5SSerge Semin is only supported in hardware blocks version 1.11a or newer or on 733264d9e5SSerge Semin Microsemi SoCs. 743264d9e5SSerge Semin 753264d9e5SSerge Semin i2c-scl-falling-time-ns: 763264d9e5SSerge Semin maxItems: 1 773264d9e5SSerge Semin description: | 783264d9e5SSerge Semin The property should contain the SCL falling time in nanoseconds. 793264d9e5SSerge Semin This value is used to compute the tLOW period. 803264d9e5SSerge Semin default: 300 813264d9e5SSerge Semin 823264d9e5SSerge Semin i2c-sda-falling-time-ns: 833264d9e5SSerge Semin maxItems: 1 843264d9e5SSerge Semin description: | 853264d9e5SSerge Semin The property should contain the SDA falling time in nanoseconds. 863264d9e5SSerge Semin This value is used to compute the tHIGH period. 873264d9e5SSerge Semin default: 300 883264d9e5SSerge Semin 893264d9e5SSerge Semin dmas: 903264d9e5SSerge Semin items: 913264d9e5SSerge Semin - description: TX DMA Channel 923264d9e5SSerge Semin - description: RX DMA Channel 933264d9e5SSerge Semin 943264d9e5SSerge Semin dma-names: 953264d9e5SSerge Semin items: 963264d9e5SSerge Semin - const: tx 973264d9e5SSerge Semin - const: rx 983264d9e5SSerge Semin 993264d9e5SSerge SeminunevaluatedProperties: false 1003264d9e5SSerge Semin 1013264d9e5SSerge Seminrequired: 1023264d9e5SSerge Semin - compatible 1033264d9e5SSerge Semin - reg 1043264d9e5SSerge Semin - "#address-cells" 1053264d9e5SSerge Semin - "#size-cells" 1063264d9e5SSerge Semin - interrupts 1073264d9e5SSerge Semin 1083264d9e5SSerge Seminexamples: 1093264d9e5SSerge Semin - | 1103264d9e5SSerge Semin i2c@f0000 { 1113264d9e5SSerge Semin compatible = "snps,designware-i2c"; 1123264d9e5SSerge Semin reg = <0xf0000 0x1000>; 1133264d9e5SSerge Semin #address-cells = <1>; 1143264d9e5SSerge Semin #size-cells = <0>; 1153264d9e5SSerge Semin interrupts = <11>; 1163264d9e5SSerge Semin clock-frequency = <400000>; 1173264d9e5SSerge Semin }; 1183264d9e5SSerge Semin - | 1193264d9e5SSerge Semin i2c@1120000 { 1203264d9e5SSerge Semin compatible = "snps,designware-i2c"; 1213264d9e5SSerge Semin reg = <0x1120000 0x1000>; 1223264d9e5SSerge Semin #address-cells = <1>; 1233264d9e5SSerge Semin #size-cells = <0>; 1243264d9e5SSerge Semin interrupts = <12 1>; 1253264d9e5SSerge Semin clock-frequency = <400000>; 1263264d9e5SSerge Semin i2c-sda-hold-time-ns = <300>; 1273264d9e5SSerge Semin i2c-sda-falling-time-ns = <300>; 1283264d9e5SSerge Semin i2c-scl-falling-time-ns = <300>; 1293264d9e5SSerge Semin }; 1303264d9e5SSerge Semin - | 1313264d9e5SSerge Semin i2c@2000 { 1323264d9e5SSerge Semin compatible = "snps,designware-i2c"; 1333264d9e5SSerge Semin reg = <0x2000 0x100>; 1343264d9e5SSerge Semin #address-cells = <1>; 1353264d9e5SSerge Semin #size-cells = <0>; 1363264d9e5SSerge Semin clock-frequency = <400000>; 1373264d9e5SSerge Semin clocks = <&i2cclk>; 1383264d9e5SSerge Semin interrupts = <0>; 1393264d9e5SSerge Semin 1403264d9e5SSerge Semin eeprom@64 { 14125d11e9eSSerge Semin compatible = "atmel,24c02"; 14225d11e9eSSerge Semin reg = <0x64>; 1433264d9e5SSerge Semin }; 1443264d9e5SSerge Semin }; 1453264d9e5SSerge Semin - | 1463264d9e5SSerge Semin i2c@100400 { 1473264d9e5SSerge Semin compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; 1483264d9e5SSerge Semin reg = <0x100400 0x100>, <0x198 0x8>; 1493264d9e5SSerge Semin pinctrl-0 = <&i2c_pins>; 1503264d9e5SSerge Semin pinctrl-names = "default"; 1513264d9e5SSerge Semin #address-cells = <1>; 1523264d9e5SSerge Semin #size-cells = <0>; 1533264d9e5SSerge Semin interrupts = <8>; 1543264d9e5SSerge Semin clocks = <&ahb_clk>; 1553264d9e5SSerge Semin }; 1563264d9e5SSerge Semin... 157