1Generic device tree bindings for I2C busses
2===========================================
3
4This document describes generic bindings which can be used to describe I2C
5busses in a device tree.
6
7Required properties
8-------------------
9
10- #address-cells  - should be <1>. Read more about addresses below.
11- #size-cells     - should be <0>.
12- compatible      - name of I2C bus controller following generic names
13		    recommended practice.
14
15For other required properties e.g. to describe register sets,
16clocks, etc. check the binding documentation of the specific driver.
17
18The cells properties above define that an address of children of an I2C bus
19are described by a single value. This is usually a 7 bit address. However,
20flags can be attached to the address. I2C_TEN_BIT_ADDRESS is used to mark a 10
21bit address. It is needed to avoid the ambiguity between e.g. a 7 bit address
22of 0x50 and a 10 bit address of 0x050 which, in theory, can be on the same bus.
23Another flag is I2C_OWN_SLAVE_ADDRESS to mark addresses on which we listen to
24be devices ourselves.
25
26Optional properties
27-------------------
28
29These properties may not be supported by all drivers. However, if a driver
30wants to support one of the below features, it should adapt the bindings below.
31
32- clock-frequency
33	frequency of bus clock in Hz.
34
35- i2c-bus
36	For I2C adapters that have child nodes that are a mixture of both I2C
37	devices and non-I2C devices, the 'i2c-bus' subnode can be used for
38	populating I2C devices. If the 'i2c-bus' subnode is present, only
39	subnodes of this will be considered as I2C slaves. The properties,
40	'#address-cells' and '#size-cells' must be defined under this subnode
41	if present.
42
43- i2c-scl-falling-time-ns
44	Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
45	specification.
46
47- i2c-scl-internal-delay-ns
48	Number of nanoseconds the IP core additionally needs to setup SCL.
49
50- i2c-scl-rising-time-ns
51	Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
52	specification.
53
54- i2c-sda-falling-time-ns
55	Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
56	specification.
57
58- interrupts
59	interrupts used by the device.
60
61- interrupt-names
62	"irq" and "wakeup" names are recognized by I2C core, other names are
63	left to individual drivers.
64
65- multi-master
66	states that there is another master active on this bus. The OS can use
67	this information to adapt power management to keep the arbitration awake
68	all the time, for example.
69
70- wakeup-source
71	device can be used as a wakeup source.
72
73- reg
74	I2C slave addresses
75
76- reg-names
77	Names of map programmable addresses.
78	It can contain any map needing another address than default one.
79
80Binding may contain optional "interrupts" property, describing interrupts
81used by the device. I2C core will assign "irq" interrupt (or the very first
82interrupt if not using interrupt names) as primary interrupt for the slave.
83
84Also, if device is marked as a wakeup source, I2C core will set up "wakeup"
85interrupt for the device. If "wakeup" interrupt name is not present in the
86binding, then primary interrupt will be used as wakeup interrupt.
87