1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs 8 9maintainers: 10 - Chris Packham <chris.packham@alliedtelesis.co.nz> 11 12allOf: 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - mpc5200-i2c 21 - fsl,mpc5200-i2c 22 - fsl,mpc5121-i2c 23 - fsl,mpc8313-i2c 24 - fsl,mpc8543-i2c 25 - fsl,mpc8544-i2c 26 - const: fsl-i2c 27 - items: 28 - const: fsl,mpc5200b-i2c 29 - const: fsl,mpc5200-i2c 30 - const: fsl-i2c 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 maxItems: 1 37 38 fsl,preserve-clocking: 39 $ref: /schemas/types.yaml#/definitions/flag 40 description: | 41 if defined, the clock settings from the bootloader are 42 preserved (not touched) 43 44 fsl,timeout: 45 $ref: /schemas/types.yaml#/definitions/uint32 46 description: | 47 I2C bus timeout in microseconds 48 49required: 50 - compatible 51 - reg 52 - interrupts 53 54unevaluatedProperties: false 55 56examples: 57 - | 58 /* MPC5121 based board */ 59 i2c@1740 { 60 #address-cells = <1>; 61 #size-cells = <0>; 62 compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 63 reg = <0x1740 0x20>; 64 interrupts = <11 0x8>; 65 interrupt-parent = <&ipic>; 66 clock-frequency = <100000>; 67 }; 68 69 /* MPC5200B based board */ 70 i2c@3d00 { 71 #address-cells = <1>; 72 #size-cells = <0>; 73 compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c"; 74 reg = <0x3d00 0x40>; 75 interrupts = <2 15 0>; 76 interrupt-parent = <&mpc5200_pic>; 77 fsl,preserve-clocking; 78 }; 79 80 /* MPC8544 base board */ 81 i2c@3100 { 82 #address-cells = <1>; 83 #size-cells = <0>; 84 compatible = "fsl,mpc8544-i2c", "fsl-i2c"; 85 reg = <0x3100 0x100>; 86 interrupts = <43 2>; 87 interrupt-parent = <&mpic>; 88 clock-frequency = <400000>; 89 fsl,timeout = <10000>; 90 }; 91... 92