1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
8
9allOf:
10  - $ref: /schemas/i2c/i2c-controller.yaml#
11
12properties:
13  compatible:
14    oneOf:
15      - const: fsl,imx1-i2c
16      - const: fsl,imx21-i2c
17      - const: fsl,vf610-i2c
18      - items:
19          - const: fsl,imx35-i2c
20          - const: fsl,imx1-i2c
21      - items:
22          - const: fsl,imx7d-i2c
23          - const: fsl,imx21-i2c
24      - items:
25          - enum:
26              - fsl,imx25-i2c
27              - fsl,imx27-i2c
28              - fsl,imx31-i2c
29              - fsl,imx50-i2c
30              - fsl,imx51-i2c
31              - fsl,imx53-i2c
32              - fsl,imx6q-i2c
33              - fsl,imx6sl-i2c
34              - fsl,imx6sx-i2c
35              - fsl,imx6sll-i2c
36              - fsl,imx6ul-i2c
37              - fsl,imx7s-i2c
38              - fsl,imx8mq-i2c
39              - fsl,imx8mm-i2c
40              - fsl,imx8mn-i2c
41              - fsl,imx8mp-i2c
42          - const: fsl,imx21-i2c
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    maxItems: 1
49
50  clocks:
51    maxItems: 1
52
53  clock-names:
54    const: ipg
55
56  clock-frequency:
57    enum: [ 100000, 400000 ]
58
59  dmas:
60    items:
61      - description: DMA controller phandle and request line for RX
62      - description: DMA controller phandle and request line for TX
63
64  dma-names:
65    items:
66      - const: rx
67      - const: tx
68
69  sda-gpios:
70    maxItems: 1
71
72  scl-gpios:
73    maxItems: 1
74
75required:
76  - compatible
77  - reg
78  - interrupts
79  - clocks
80
81unevaluatedProperties: false
82
83examples:
84  - |
85    #include <dt-bindings/clock/imx5-clock.h>
86    #include <dt-bindings/clock/vf610-clock.h>
87    #include <dt-bindings/gpio/gpio.h>
88    #include <dt-bindings/interrupt-controller/arm-gic.h>
89
90    i2c@83fc4000 {
91        compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
92        reg = <0x83fc4000 0x4000>;
93        interrupts = <63>;
94        clocks = <&clks IMX5_CLK_I2C2_GATE>;
95    };
96
97    i2c@40066000 {
98        compatible = "fsl,vf610-i2c";
99        reg = <0x40066000 0x1000>;
100        interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
101        clocks = <&clks VF610_CLK_I2C0>;
102        clock-names = "ipg";
103        dmas = <&edma0 0 50>,
104               <&edma0 0 51>;
105        dma-names = "rx", "tx";
106    };
107