1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Low Power Inter IC (LPI2C) for i.MX
8
9maintainers:
10  - Anson Huang <Anson.Huang@nxp.com>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - enum:
19          - fsl,imx7ulp-lpi2c
20      - items:
21          - enum:
22              - fsl,imx8qxp-lpi2c
23              - fsl,imx8dxl-lpi2c
24              - fsl,imx8qm-lpi2c
25              - fsl,imx8ulp-lpi2c
26          - const: fsl,imx7ulp-lpi2c
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  assigned-clock-parents: true
35  assigned-clock-rates: true
36  assigned-clocks: true
37  clock-frequency: true
38
39  clock-names:
40    items:
41      - const: per
42      - const: ipg
43
44  clocks:
45    maxItems: 2
46
47  power-domains:
48    maxItems: 1
49
50required:
51  - compatible
52  - reg
53  - interrupts
54  - clocks
55
56unevaluatedProperties: false
57
58examples:
59  - |
60    #include <dt-bindings/clock/imx7ulp-clock.h>
61    #include <dt-bindings/interrupt-controller/arm-gic.h>
62
63    i2c@40a50000 {
64        compatible = "fsl,imx7ulp-lpi2c";
65        reg = <0x40A50000 0x10000>;
66        interrupt-parent = <&intc>;
67        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
68        clocks = <&clks IMX7ULP_CLK_LPI2C7>,
69                 <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
70    };
71