1c217cf81SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c217cf81SAnson Huang%YAML 1.2 3c217cf81SAnson Huang--- 4c217cf81SAnson Huang$id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml# 5c217cf81SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 6c217cf81SAnson Huang 7c217cf81SAnson Huangtitle: Freescale Low Power Inter IC (LPI2C) for i.MX 8c217cf81SAnson Huang 9c217cf81SAnson Huangmaintainers: 10c217cf81SAnson Huang - Anson Huang <Anson.Huang@nxp.com> 11c217cf81SAnson Huang 12c217cf81SAnson Huangproperties: 13c217cf81SAnson Huang compatible: 14c217cf81SAnson Huang enum: 15c217cf81SAnson Huang - fsl,imx7ulp-lpi2c 16c217cf81SAnson Huang - fsl,imx8qxp-lpi2c 17c217cf81SAnson Huang - fsl,imx8qm-lpi2c 18c217cf81SAnson Huang 19c217cf81SAnson Huang reg: 20c217cf81SAnson Huang maxItems: 1 21c217cf81SAnson Huang 22c217cf81SAnson Huang interrupts: 23c217cf81SAnson Huang maxItems: 1 24c217cf81SAnson Huang 25c217cf81SAnson Huang clocks: 26c217cf81SAnson Huang maxItems: 1 27c217cf81SAnson Huang 28c217cf81SAnson Huangrequired: 29c217cf81SAnson Huang - compatible 30c217cf81SAnson Huang - reg 31c217cf81SAnson Huang - interrupts 32c217cf81SAnson Huang - clocks 33c217cf81SAnson Huang 34c217cf81SAnson HuangadditionalProperties: false 35c217cf81SAnson Huang 36c217cf81SAnson Huangexamples: 37c217cf81SAnson Huang - | 38c217cf81SAnson Huang #include <dt-bindings/clock/imx7ulp-clock.h> 39c217cf81SAnson Huang #include <dt-bindings/interrupt-controller/arm-gic.h> 40c217cf81SAnson Huang 41c217cf81SAnson Huang lpi2c7@40a50000 { 42c217cf81SAnson Huang compatible = "fsl,imx7ulp-lpi2c"; 43c217cf81SAnson Huang reg = <0x40A50000 0x10000>; 44c217cf81SAnson Huang interrupt-parent = <&intc>; 45c217cf81SAnson Huang interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 46c217cf81SAnson Huang clocks = <&clks IMX7ULP_CLK_LPI2C7>; 47c217cf81SAnson Huang }; 48