1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung's High Speed I2C controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
11
12description: |
13  The Samsung's High Speed I2C controller is used to interface with I2C devices
14  at various speeds ranging from 100kHz to 3.4MHz.
15
16  In case the HSI2C controller is encapsulated within USI block (it's the case
17  e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18  define USI node in device tree file, choosing "i2c" configuration. Please see
19  Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
20
21allOf:
22  - $ref: /schemas/i2c/i2c-controller.yaml#
23
24properties:
25  compatible:
26    oneOf:
27      - enum:
28          - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
29          - samsung,exynos5260-hsi2c    # Exynos5260
30          - samsung,exynos7-hsi2c       # Exynos7
31          - samsung,exynosautov9-hsi2c  # ExynosAutoV9 and Exynos850
32      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420
33        deprecated: true
34
35  reg:
36    maxItems: 1
37
38  interrupts:
39    maxItems: 1
40
41  clock-frequency:
42    default: 100000
43    description:
44      Desired operating frequency in Hz of the bus.
45
46      If not specified, the bus operates in fast-speed mode at 100kHz.
47
48      If specified, the bus operates in high-speed mode only if the
49      clock-frequency is >= 1MHz.
50
51  clocks:
52    maxItems: 1
53    description: I2C operating clock
54
55  clock-names:
56    const: hsi2c
57
58required:
59  - compatible
60  - reg
61  - interrupts
62  - clocks
63
64unevaluatedProperties: false
65
66examples:
67  - |
68    #include <dt-bindings/clock/exynos5420.h>
69    #include <dt-bindings/interrupt-controller/arm-gic.h>
70    #include <dt-bindings/interrupt-controller/irq.h>
71
72    hsi2c_8: i2c@12e00000 {
73        compatible = "samsung,exynos5250-hsi2c";
74        reg = <0x12e00000 0x1000>;
75        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
76        #address-cells = <1>;
77        #size-cells = <0>;
78        clock-frequency = <100000>;
79        clocks = <&clock CLK_USI4>;
80        clock-names = "hsi2c";
81
82        pmic@66 {
83            /* compatible = "samsung,s2mps11-pmic"; */
84            reg = <0x66>;
85        };
86    };
87