1aea37006SNobuhiro Iwamatsu# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2aea37006SNobuhiro Iwamatsu%YAML 1.2 3aea37006SNobuhiro Iwamatsu--- 4aea37006SNobuhiro Iwamatsu$id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#" 5aea37006SNobuhiro Iwamatsu$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6aea37006SNobuhiro Iwamatsu 7aea37006SNobuhiro Iwamatsutitle: Cadence I2C controller Device Tree Bindings 8aea37006SNobuhiro Iwamatsu 9aea37006SNobuhiro Iwamatsumaintainers: 10aea37006SNobuhiro Iwamatsu - Michal Simek <michal.simek@xilinx.com> 11aea37006SNobuhiro Iwamatsu 12aea37006SNobuhiro IwamatsuallOf: 13aea37006SNobuhiro Iwamatsu - $ref: /schemas/i2c/i2c-controller.yaml# 14aea37006SNobuhiro Iwamatsu 15aea37006SNobuhiro Iwamatsuproperties: 16aea37006SNobuhiro Iwamatsu compatible: 17aea37006SNobuhiro Iwamatsu enum: 18aea37006SNobuhiro Iwamatsu - cdns,i2c-r1p10 # cadence i2c controller version 1.0 19aea37006SNobuhiro Iwamatsu - cdns,i2c-r1p14 # cadence i2c controller version 1.4 20aea37006SNobuhiro Iwamatsu 21aea37006SNobuhiro Iwamatsu reg: 22aea37006SNobuhiro Iwamatsu maxItems: 1 23aea37006SNobuhiro Iwamatsu 24aea37006SNobuhiro Iwamatsu clocks: 25aea37006SNobuhiro Iwamatsu minItems: 1 26aea37006SNobuhiro Iwamatsu 27aea37006SNobuhiro Iwamatsu interrupts: 28aea37006SNobuhiro Iwamatsu maxItems: 1 29aea37006SNobuhiro Iwamatsu 30aea37006SNobuhiro Iwamatsu clock-frequency: 31aea37006SNobuhiro Iwamatsu minimum: 1 32aea37006SNobuhiro Iwamatsu maximum: 400000 33aea37006SNobuhiro Iwamatsu description: | 34aea37006SNobuhiro Iwamatsu Desired operating frequency, in Hz, of the bus. 35aea37006SNobuhiro Iwamatsu 36aea37006SNobuhiro Iwamatsu clock-name: 37aea37006SNobuhiro Iwamatsu const: pclk 38aea37006SNobuhiro Iwamatsu description: | 39aea37006SNobuhiro Iwamatsu Input clock name. 40aea37006SNobuhiro Iwamatsu 41aea37006SNobuhiro Iwamatsurequired: 42aea37006SNobuhiro Iwamatsu - compatible 43aea37006SNobuhiro Iwamatsu - reg 44aea37006SNobuhiro Iwamatsu - clocks 45aea37006SNobuhiro Iwamatsu - interrupts 46aea37006SNobuhiro Iwamatsu 47aea37006SNobuhiro Iwamatsuexamples: 48aea37006SNobuhiro Iwamatsu - | 49aea37006SNobuhiro Iwamatsu #include <dt-bindings/interrupt-controller/arm-gic.h> 50aea37006SNobuhiro Iwamatsu i2c@e0004000 { 51aea37006SNobuhiro Iwamatsu compatible = "cdns,i2c-r1p10"; 52aea37006SNobuhiro Iwamatsu clocks = <&clkc 38>; 53aea37006SNobuhiro Iwamatsu interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 54aea37006SNobuhiro Iwamatsu reg = <0xe0004000 0x1000>; 55aea37006SNobuhiro Iwamatsu clock-frequency = <400000>; 56aea37006SNobuhiro Iwamatsu #address-cells = <1>; 57aea37006SNobuhiro Iwamatsu #size-cells = <0>; 58aea37006SNobuhiro Iwamatsu }; 59