1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: I2C for Atmel/Microchip platforms 9 10maintainers: 11 - Alexandre Belloni <alexandre.belloni@bootlin.com> 12 13properties: 14 compatible: 15 enum: 16 - atmel,at91rm9200-i2c 17 - atmel,at91sam9261-i2c 18 - atmel,at91sam9260-i2c 19 - atmel,at91sam9g20-i2c 20 - atmel,at91sam9g10-i2c 21 - atmel,at91sam9x5-i2c 22 - atmel,sama5d4-i2c 23 - atmel,sama5d2-i2c 24 - microchip,sam9x60-i2c 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 maxItems: 1 31 32 "#address-cells": 33 const: 1 34 35 "#size-cells": 36 const: 0 37 38 clocks: 39 maxItems: 1 40 41 clock-frequency: 42 default: 100000 43 44 dmas: 45 items: 46 - description: TX DMA Channel Specifier 47 - description: RX DMA Channel Specifier 48 49 dma-names: 50 items: 51 - const: tx 52 - const: rx 53 54 atmel,fifo-size: 55 $ref: /schemas/types.yaml#/definitions/uint32 56 description: | 57 Maximum number of data the RX and TX FIFOs can store for 58 FIFO capable I2C controllers. 59 60 scl-gpios: true 61 62 sda-gpios: true 63 64required: 65 - compatible 66 - reg 67 - interrupts 68 - "#address-cells" 69 - "#size-cells" 70 - clocks 71 72allOf: 73 - $ref: "i2c-controller.yaml" 74 - if: 75 properties: 76 compatible: 77 contains: 78 enum: 79 - atmel,sama5d4-i2c 80 - atmel,sama5d2-i2c 81 - microchip,sam9x60-i2c 82 then: 83 properties: 84 i2c-sda-hold-time-ns: 85 description: 86 TWD hold time 87 maxItems: 1 88 89unevaluatedProperties: false 90 91examples: 92 - | 93 #include <dt-bindings/interrupt-controller/irq.h> 94 #include <dt-bindings/dma/at91.h> 95 #include <dt-bindings/gpio/gpio.h> 96 97 i2c0: i2c@fff84000 { 98 compatible = "atmel,at91sam9g20-i2c"; 99 reg = <0xfff84000 0x100>; 100 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 101 #address-cells = <1>; 102 #size-cells = <0>; 103 clocks = <&twi0_clk>; 104 clock-frequency = <400000>; 105 106 eeprom@50 { 107 compatible = "atmel,24c512"; 108 reg = <0x50>; 109 pagesize = <128>; 110 }; 111 }; 112 113 i2c1: i2c@f8034600 { 114 compatible = "atmel,sama5d2-i2c"; 115 reg = <0xf8034600 0x100>; 116 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; 117 dmas = <&dma0 118 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) 119 AT91_XDMAC_DT_PERID(11)>, 120 <&dma0 121 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)) 122 AT91_XDMAC_DT_PERID(12)>; 123 dma-names = "tx", "rx"; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 clocks = <&flx0>; 127 atmel,fifo-size = <16>; 128 i2c-sda-hold-time-ns = <336>; 129 pinctrl-names = "default", "gpio"; 130 pinctrl-0 = <&pinctrl_i2c0>; 131 pinctrl-1 = <&pinctrl_i2c0_gpio>; 132 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; 133 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 134 135 eeprom@54 { 136 compatible = "atmel,24c02"; 137 reg = <0x54>; 138 pagesize = <16>; 139 }; 140 }; 141