1OMAP SSI controller bindings 2 3OMAP3's Synchronous Serial Interface (SSI) controller implements a 4legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI), 5while the controller found inside OMAP4 is supposed to be fully compliant 6with the HSI standard. 7 8Required properties: 9- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi" 10- reg-names: Contains the values "sys" and "gdd" (in this order). 11- reg: Contains a matching register specifier for each entry 12 in reg-names. 13- interrupt-names: Contains the value "gdd_mpu". 14- interrupts: Contains matching interrupt information for each entry 15 in interrupt-names. 16- ranges: Represents the bus address mapping between the main 17 controller node and the child nodes below. 18- clock-names: Must include the following entries: 19 "ssi_ssr_fck": The OMAP clock of that name 20 "ssi_sst_fck": The OMAP clock of that name 21 "ssi_ick": The OMAP clock of that name 22- clocks: Contains a matching clock specifier for each entry in 23 clock-names. 24- #address-cells: Should be set to <1> 25- #size-cells: Should be set to <1> 26 27Each port is represented as a sub-node of the ti,omap3-ssi device. 28 29Required Port sub-node properties: 30- compatible: Should be set to the following value 31 ti,omap3-ssi-port (applicable to OMAP34xx devices) 32 ti,omap4-hsi-port (applicable to OMAP44xx devices) 33- reg-names: Contains the values "tx" and "rx" (in this order). 34- reg: Contains a matching register specifier for each entry 35 in reg-names. 36- interrupt-parent Should be a phandle for the interrupt controller 37- interrupts: Should contain interrupt specifiers for mpu interrupts 38 0 and 1 (in this order). 39- ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE 40 events for the port. This is an optional board-specific 41 property. If it's missing the port will not be 42 enabled. 43 44Optional properties: 45- ti,hwmods: Shall contain TI interconnect module name if needed 46 by the SoC 47 48Example for Nokia N900: 49 50ssi-controller@48058000 { 51 compatible = "ti,omap3-ssi"; 52 53 /* needed until hwmod is updated to use the compatible string */ 54 ti,hwmods = "ssi"; 55 56 reg = <0x48058000 0x1000>, 57 <0x48059000 0x1000>; 58 reg-names = "sys", 59 "gdd"; 60 61 interrupts = <55>; 62 interrupt-names = "gdd_mpu"; 63 64 clocks = <&ssi_ssr_fck>, 65 <&ssi_sst_fck>, 66 <&ssi_ick>; 67 clock-names = "ssi_ssr_fck", 68 "ssi_sst_fck", 69 "ssi_ick"; 70 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 75 ssi-port@4805a000 { 76 compatible = "ti,omap3-ssi-port"; 77 78 reg = <0x4805a000 0x800>, 79 <0x4805a800 0x800>; 80 reg-names = "tx", 81 "rx"; 82 83 interrupt-parent = <&intc>; 84 interrupts = <67>, 85 <68>; 86 87 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */ 88 } 89 90 ssi-port@4805a000 { 91 compatible = "ti,omap3-ssi-port"; 92 93 reg = <0x4805b000 0x800>, 94 <0x4805b800 0x800>; 95 reg-names = "tx", 96 "rx"; 97 98 interrupt-parent = <&intc>; 99 interrupts = <69>, 100 <70>; 101 102 } 103} 104