1NVIDIA Tegra Graphics Processing Units
2
3Required properties:
4- compatible: "nvidia,<gpu>"
5  Currently recognized values:
6  - nvidia,gk20a
7  - nvidia,gm20b
8- reg: Physical base address and length of the controller's registers.
9  Must contain two entries:
10  - first entry for bar0
11  - second entry for bar1
12- interrupts: Must contain an entry for each entry in interrupt-names.
13  See ../interrupt-controller/interrupts.txt for details.
14- interrupt-names: Must include the following entries:
15  - stall
16  - nonstall
17- vdd-supply: regulator for supply voltage.
18- clocks: Must contain an entry for each entry in clock-names.
19  See ../clocks/clock-bindings.txt for details.
20- clock-names: Must include the following entries:
21  - gpu
22  - pwr
23If the compatible string is "nvidia,gm20b", then the following clock
24is also required:
25  - ref
26- resets: Must contain an entry for each entry in reset-names.
27  See ../reset/reset.txt for details.
28- reset-names: Must include the following entries:
29  - gpu
30
31Optional properties:
32- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
33
34Example for GK20A:
35
36	gpu@57000000 {
37		compatible = "nvidia,gk20a";
38		reg = <0x0 0x57000000 0x0 0x01000000>,
39		      <0x0 0x58000000 0x0 0x01000000>;
40		interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
41			     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
42		interrupt-names = "stall", "nonstall";
43		vdd-supply = <&vdd_gpu>;
44		clocks = <&tegra_car TEGRA124_CLK_GPU>,
45			 <&tegra_car TEGRA124_CLK_PLL_P_OUT5>;
46		clock-names = "gpu", "pwr";
47		resets = <&tegra_car 184>;
48		reset-names = "gpu";
49		iommus = <&mc TEGRA_SWGROUP_GPU>;
50		status = "disabled";
51	};
52
53Example for GM20B:
54
55	gpu@57000000 {
56		compatible = "nvidia,gm20b";
57		reg = <0x0 0x57000000 0x0 0x01000000>,
58		      <0x0 0x58000000 0x0 0x01000000>;
59		interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
60			     <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
61		interrupt-names = "stall", "nonstall";
62		clocks = <&tegra_car TEGRA210_CLK_GPU>,
63			 <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
64			 <&tegra_car TEGRA210_CLK_PLL_G_REF>;
65		clock-names = "gpu", "pwr", "ref";
66		resets = <&tegra_car 184>;
67		reset-names = "gpu";
68		iommus = <&mc TEGRA_SWGROUP_GPU>;
69		status = "disabled";
70	};
71