1NVIDIA GK20A Graphics Processing Unit 2 3Required properties: 4- compatible: "nvidia,<gpu>" 5 Currently recognized values: 6 - nvidia,gk20a 7- reg: Physical base address and length of the controller's registers. 8 Must contain two entries: 9 - first entry for bar0 10 - second entry for bar1 11- interrupts: Must contain an entry for each entry in interrupt-names. 12 See ../interrupt-controller/interrupts.txt for details. 13- interrupt-names: Must include the following entries: 14 - stall 15 - nonstall 16- vdd-supply: regulator for supply voltage. 17- clocks: Must contain an entry for each entry in clock-names. 18 See ../clocks/clock-bindings.txt for details. 19- clock-names: Must include the following entries: 20 - gpu 21 - pwr 22- resets: Must contain an entry for each entry in reset-names. 23 See ../reset/reset.txt for details. 24- reset-names: Must include the following entries: 25 - gpu 26 27Optional properties: 28- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details. 29 30Example: 31 32 gpu@0,57000000 { 33 compatible = "nvidia,gk20a"; 34 reg = <0x0 0x57000000 0x0 0x01000000>, 35 <0x0 0x58000000 0x0 0x01000000>; 36 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 37 <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 38 interrupt-names = "stall", "nonstall"; 39 vdd-supply = <&vdd_gpu>; 40 clocks = <&tegra_car TEGRA124_CLK_GPU>, 41 <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; 42 clock-names = "gpu", "pwr"; 43 resets = <&tegra_car 184>; 44 reset-names = "gpu"; 45 iommus = <&mc TEGRA_SWGROUP_GPU>; 46 status = "disabled"; 47 }; 48