1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Utgard GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11  - Maxime Ripard <maxime.ripard@free-electrons.com>
12  - Heiko Stuebner <heiko@sntech.de>
13
14properties:
15  $nodename:
16    pattern: '^gpu@[a-f0-9]+$'
17  compatible:
18    oneOf:
19      - items:
20          - const: allwinner,sun8i-a23-mali
21          - const: allwinner,sun7i-a20-mali
22          - const: arm,mali-400
23      - items:
24          - enum:
25              - allwinner,sun4i-a10-mali
26              - allwinner,sun7i-a20-mali
27              - allwinner,sun8i-h3-mali
28              - allwinner,sun8i-r40-mali
29              - allwinner,sun50i-a64-mali
30              - rockchip,rk3036-mali
31              - rockchip,rk3066-mali
32              - rockchip,rk3188-mali
33              - rockchip,rk3228-mali
34              - samsung,exynos4210-mali
35              - stericsson,db8500-mali
36          - const: arm,mali-400
37      - items:
38          - enum:
39              - allwinner,sun50i-h5-mali
40              - amlogic,meson8-mali
41              - amlogic,meson8b-mali
42              - amlogic,meson-gxbb-mali
43              - amlogic,meson-gxl-mali
44              - hisilicon,hi6220-mali
45              - mediatek,mt7623-mali
46              - rockchip,rk3328-mali
47          - const: arm,mali-450
48
49      # "arm,mali-300"
50
51  reg:
52    maxItems: 1
53
54  interrupts:
55    minItems: 4
56    maxItems: 20
57
58  interrupt-names:
59    allOf:
60      - additionalItems: true
61        minItems: 4
62        maxItems: 20
63        items:
64          # At least enforce the first 2 interrupts
65          - const: gp
66          - const: gpmmu
67      - items:
68          # Not ideal as any order and combination are allowed
69          enum:
70            - gp        # Geometry Processor interrupt
71            - gpmmu     # Geometry Processor MMU interrupt
72            - pp        # Pixel Processor broadcast interrupt (mali-450 only)
73            - pp0       # Pixel Processor X interrupt (X from 0 to 7)
74            - ppmmu0    # Pixel Processor X MMU interrupt (X from 0 to 7)
75            - pp1
76            - ppmmu1
77            - pp2
78            - ppmmu2
79            - pp3
80            - ppmmu3
81            - pp4
82            - ppmmu4
83            - pp5
84            - ppmmu5
85            - pp6
86            - ppmmu6
87            - pp7
88            - ppmmu7
89            - pmu       # Power Management Unit interrupt (optional)
90            - combined  # stericsson,db8500-mali only
91
92  clocks:
93    maxItems: 2
94
95  clock-names:
96    items:
97      - const: bus
98      - const: core
99
100  memory-region: true
101
102  mali-supply: true
103
104  power-domains:
105    maxItems: 1
106
107  resets:
108    maxItems: 1
109
110  operating-points-v2: true
111
112  "#cooling-cells":
113    const: 2
114
115required:
116  - compatible
117  - reg
118  - interrupts
119  - interrupt-names
120  - clocks
121  - clock-names
122
123additionalProperties: false
124
125allOf:
126  - if:
127      properties:
128        compatible:
129          contains:
130            enum:
131              - allwinner,sun4i-a10-mali
132              - allwinner,sun7i-a20-mali
133              - allwinner,sun8i-r40-mali
134              - allwinner,sun50i-a64-mali
135              - allwinner,sun50i-h5-mali
136              - amlogic,meson8-mali
137              - amlogic,meson8b-mali
138              - hisilicon,hi6220-mali
139              - mediatek,mt7623-mali
140              - rockchip,rk3036-mali
141              - rockchip,rk3066-mali
142              - rockchip,rk3188-mali
143              - rockchip,rk3228-mali
144              - rockchip,rk3328-mali
145    then:
146      required:
147        - resets
148
149examples:
150  - |
151    #include <dt-bindings/interrupt-controller/irq.h>
152    #include <dt-bindings/interrupt-controller/arm-gic.h>
153
154    mali: gpu@1c40000 {
155      compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
156      reg = <0x01c40000 0x10000>;
157      interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
158             <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
159             <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
160             <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
161             <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
162             <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
163             <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
164      interrupt-names = "gp",
165            "gpmmu",
166            "pp0",
167            "ppmmu0",
168            "pp1",
169            "ppmmu1",
170            "pmu";
171      clocks = <&ccu 1>, <&ccu 2>;
172      clock-names = "bus", "core";
173      resets = <&ccu 1>;
174      #cooling-cells = <2>;
175    };
176
177...
178