1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ARM Mali Midgard GPU 8 9maintainers: 10 - Rob Herring <robh@kernel.org> 11 12properties: 13 $nodename: 14 pattern: '^gpu@[a-f0-9]+$' 15 compatible: 16 oneOf: 17 - items: 18 - enum: 19 - allwinner,sun50i-h6-mali 20 - const: arm,mali-t720 21 - items: 22 - enum: 23 - amlogic,meson-gxm-mali 24 - const: arm,mali-t820 25 - items: 26 - enum: 27 - rockchip,rk3288-mali 28 - const: arm,mali-t760 29 - items: 30 - enum: 31 - rockchip,rk3399-mali 32 - const: arm,mali-t860 33 - items: 34 - enum: 35 - samsung,exynos5250-mali 36 - const: arm,mali-t604 37 - items: 38 - enum: 39 - samsung,exynos5433-mali 40 - const: arm,mali-t760 41 42 # "arm,mali-t624" 43 # "arm,mali-t628" 44 # "arm,mali-t830" 45 # "arm,mali-t880" 46 47 reg: 48 maxItems: 1 49 50 interrupts: 51 items: 52 - description: Job interrupt 53 - description: MMU interrupt 54 - description: GPU interrupt 55 56 interrupt-names: 57 items: 58 - const: job 59 - const: mmu 60 - const: gpu 61 62 clocks: 63 minItems: 1 64 maxItems: 2 65 66 clock-names: 67 minItems: 1 68 items: 69 - const: core 70 - const: bus 71 72 mali-supply: 73 maxItems: 1 74 75 resets: 76 minItems: 1 77 maxItems: 2 78 79 operating-points-v2: true 80 81 "#cooling-cells": 82 const: 2 83 84required: 85 - compatible 86 - reg 87 - interrupts 88 - interrupt-names 89 - clocks 90 91allOf: 92 - if: 93 properties: 94 compatible: 95 contains: 96 const: allwinner,sun50i-h6-mali 97 then: 98 properties: 99 clocks: 100 minItems: 2 101 required: 102 - clock-names 103 - resets 104 - if: 105 properties: 106 compatible: 107 contains: 108 const: amlogic,meson-gxm-mali 109 then: 110 properties: 111 resets: 112 minItems: 2 113 required: 114 - resets 115 116examples: 117 - | 118 #include <dt-bindings/interrupt-controller/irq.h> 119 #include <dt-bindings/interrupt-controller/arm-gic.h> 120 121 gpu@ffa30000 { 122 compatible = "rockchip,rk3288-mali", "arm,mali-t760"; 123 reg = <0xffa30000 0x10000>; 124 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 125 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 126 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 127 interrupt-names = "job", "mmu", "gpu"; 128 clocks = <&cru 0>; 129 mali-supply = <&vdd_gpu>; 130 operating-points-v2 = <&gpu_opp_table>; 131 power-domains = <&power 0>; 132 #cooling-cells = <2>; 133 }; 134 135 gpu_opp_table: opp_table0 { 136 compatible = "operating-points-v2"; 137 138 opp@533000000 { 139 opp-hz = /bits/ 64 <533000000>; 140 opp-microvolt = <1250000>; 141 }; 142 opp@450000000 { 143 opp-hz = /bits/ 64 <450000000>; 144 opp-microvolt = <1150000>; 145 }; 146 opp@400000000 { 147 opp-hz = /bits/ 64 <400000000>; 148 opp-microvolt = <1125000>; 149 }; 150 opp@350000000 { 151 opp-hz = /bits/ 64 <350000000>; 152 opp-microvolt = <1075000>; 153 }; 154 opp@266000000 { 155 opp-hz = /bits/ 64 <266000000>; 156 opp-microvolt = <1025000>; 157 }; 158 opp@160000000 { 159 opp-hz = /bits/ 64 <160000000>; 160 opp-microvolt = <925000>; 161 }; 162 opp@100000000 { 163 opp-hz = /bits/ 64 <100000000>; 164 opp-microvolt = <912500>; 165 }; 166 }; 167 168... 169