1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    items:
18      - enum:
19          - amlogic,meson-g12a-mali
20          - mediatek,mt8183-mali
21          - realtek,rtd1619-mali
22          - renesas,r9a07g044-mali
23          - rockchip,px30-mali
24          - rockchip,rk3568-mali
25      - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    minItems: 3
32    items:
33      - description: Job interrupt
34      - description: MMU interrupt
35      - description: GPU interrupt
36      - description: Event interrupt
37
38  interrupt-names:
39    minItems: 3
40    items:
41      - const: job
42      - const: mmu
43      - const: gpu
44      - const: event
45
46  clocks:
47    minItems: 1
48    maxItems: 3
49
50  clock-names: true
51
52  mali-supply: true
53
54  sram-supply: true
55
56  operating-points-v2: true
57
58  power-domains:
59    minItems: 1
60    maxItems: 3
61
62  resets:
63    minItems: 1
64    maxItems: 3
65
66  reset-names: true
67
68  "#cooling-cells":
69    const: 2
70
71  dynamic-power-coefficient:
72    $ref: '/schemas/types.yaml#/definitions/uint32'
73    description:
74      A u32 value that represents the running time dynamic
75      power coefficient in units of uW/MHz/V^2. The
76      coefficient can either be calculated from power
77      measurements or derived by analysis.
78
79      The dynamic power consumption of the GPU is
80      proportional to the square of the Voltage (V) and
81      the clock frequency (f). The coefficient is used to
82      calculate the dynamic power as below -
83
84      Pdyn = dynamic-power-coefficient * V^2 * f
85
86      where voltage is in V, frequency is in MHz.
87
88  dma-coherent: true
89
90required:
91  - compatible
92  - reg
93  - interrupts
94  - interrupt-names
95  - clocks
96
97additionalProperties: false
98
99allOf:
100  - if:
101      properties:
102        compatible:
103          contains:
104            const: amlogic,meson-g12a-mali
105    then:
106      required:
107        - resets
108  - if:
109      properties:
110        compatible:
111          contains:
112            const: renesas,r9a07g044-mali
113    then:
114      properties:
115        interrupts:
116          minItems: 4
117        interrupt-names:
118          minItems: 4
119        clocks:
120          minItems: 3
121        clock-names:
122          items:
123            - const: gpu
124            - const: bus
125            - const: bus_ace
126        resets:
127          minItems: 3
128        reset-names:
129          items:
130            - const: rst
131            - const: axi_rst
132            - const: ace_rst
133      required:
134        - clock-names
135        - power-domains
136        - resets
137        - reset-names
138  - if:
139      properties:
140        compatible:
141          contains:
142            const: mediatek,mt8183-mali
143    then:
144      properties:
145        power-domains:
146          minItems: 3
147        power-domain-names:
148          items:
149            - const: core0
150            - const: core1
151            - const: core2
152
153      required:
154        - sram-supply
155        - power-domains
156        - power-domain-names
157    else:
158      properties:
159        power-domains:
160          maxItems: 1
161        sram-supply: false
162
163examples:
164  - |
165    #include <dt-bindings/interrupt-controller/irq.h>
166    #include <dt-bindings/interrupt-controller/arm-gic.h>
167
168    gpu@ffe40000 {
169      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
170      reg = <0xffe40000 0x10000>;
171      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
172             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
173             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
174      interrupt-names = "job", "mmu", "gpu";
175      clocks = <&clk 1>;
176      mali-supply = <&vdd_gpu>;
177      operating-points-v2 = <&gpu_opp_table>;
178      resets = <&reset 0>, <&reset 1>;
179    };
180
181    gpu_opp_table: opp-table {
182      compatible = "operating-points-v2";
183
184      opp-533000000 {
185        opp-hz = /bits/ 64 <533000000>;
186        opp-microvolt = <1250000>;
187      };
188      opp-450000000 {
189        opp-hz = /bits/ 64 <450000000>;
190        opp-microvolt = <1150000>;
191      };
192      opp-400000000 {
193        opp-hz = /bits/ 64 <400000000>;
194        opp-microvolt = <1125000>;
195      };
196      opp-350000000 {
197        opp-hz = /bits/ 64 <350000000>;
198        opp-microvolt = <1075000>;
199      };
200      opp-266000000 {
201        opp-hz = /bits/ 64 <266000000>;
202        opp-microvolt = <1025000>;
203      };
204      opp-160000000 {
205        opp-hz = /bits/ 64 <160000000>;
206        opp-microvolt = <925000>;
207      };
208      opp-100000000 {
209        opp-hz = /bits/ 64 <100000000>;
210        opp-microvolt = <912500>;
211      };
212    };
213
214...
215