1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM Mali Bifrost GPU
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12properties:
13  $nodename:
14    pattern: '^gpu@[a-f0-9]+$'
15
16  compatible:
17    items:
18      - enum:
19          - amlogic,meson-g12a-mali
20          - realtek,rtd1619-mali
21          - rockchip,px30-mali
22      - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    items:
29      - description: Job interrupt
30      - description: MMU interrupt
31      - description: GPU interrupt
32
33  interrupt-names:
34    items:
35      - const: job
36      - const: mmu
37      - const: gpu
38
39  clocks:
40    maxItems: 1
41
42  mali-supply: true
43
44  operating-points-v2: true
45
46  resets:
47    maxItems: 2
48
49required:
50  - compatible
51  - reg
52  - interrupts
53  - interrupt-names
54  - clocks
55
56additionalProperties: false
57
58allOf:
59  - if:
60      properties:
61        compatible:
62          contains:
63            const: amlogic,meson-g12a-mali
64    then:
65      required:
66        - resets
67
68examples:
69  - |
70    #include <dt-bindings/interrupt-controller/irq.h>
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72
73    gpu@ffe40000 {
74      compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
75      reg = <0xffe40000 0x10000>;
76      interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
77             <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
78             <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
79      interrupt-names = "job", "mmu", "gpu";
80      clocks = <&clk 1>;
81      mali-supply = <&vdd_gpu>;
82      operating-points-v2 = <&gpu_opp_table>;
83      resets = <&reset 0>, <&reset 1>;
84    };
85
86    gpu_opp_table: opp_table0 {
87      compatible = "operating-points-v2";
88
89      opp-533000000 {
90        opp-hz = /bits/ 64 <533000000>;
91        opp-microvolt = <1250000>;
92      };
93      opp-450000000 {
94        opp-hz = /bits/ 64 <450000000>;
95        opp-microvolt = <1150000>;
96      };
97      opp-400000000 {
98        opp-hz = /bits/ 64 <400000000>;
99        opp-microvolt = <1125000>;
100      };
101      opp-350000000 {
102        opp-hz = /bits/ 64 <350000000>;
103        opp-microvolt = <1075000>;
104      };
105      opp-266000000 {
106        opp-hz = /bits/ 64 <266000000>;
107        opp-microvolt = <1025000>;
108      };
109      opp-160000000 {
110        opp-hz = /bits/ 64 <160000000>;
111        opp-microvolt = <925000>;
112      };
113      opp-100000000 {
114        opp-hz = /bits/ 64 <100000000>;
115        opp-microvolt = <912500>;
116      };
117    };
118
119...
120