17875f824SYash Shah# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 27875f824SYash Shah%YAML 1.2 37875f824SYash Shah--- 47875f824SYash Shah$id: http://devicetree.org/schemas/gpio/sifive,gpio.yaml# 57875f824SYash Shah$schema: http://devicetree.org/meta-schemas/core.yaml# 67875f824SYash Shah 77875f824SYash Shahtitle: SiFive GPIO controller 87875f824SYash Shah 97875f824SYash Shahmaintainers: 107875f824SYash Shah - Yash Shah <yash.shah@sifive.com> 117875f824SYash Shah - Paul Walmsley <paul.walmsley@sifive.com> 127875f824SYash Shah 137875f824SYash Shahproperties: 147875f824SYash Shah compatible: 157875f824SYash Shah items: 167875f824SYash Shah - const: sifive,fu540-c000-gpio 177875f824SYash Shah - const: sifive,gpio0 187875f824SYash Shah 197875f824SYash Shah reg: 207875f824SYash Shah maxItems: 1 217875f824SYash Shah 227875f824SYash Shah interrupts: 237875f824SYash Shah description: 247875f824SYash Shah interrupt mapping one per GPIO. Maximum 16 GPIOs. 257875f824SYash Shah minItems: 1 267875f824SYash Shah maxItems: 16 277875f824SYash Shah 287875f824SYash Shah interrupt-controller: true 297875f824SYash Shah 307875f824SYash Shah "#interrupt-cells": 317875f824SYash Shah const: 2 327875f824SYash Shah 337875f824SYash Shah clocks: 347875f824SYash Shah maxItems: 1 357875f824SYash Shah 367875f824SYash Shah "#gpio-cells": 377875f824SYash Shah const: 2 387875f824SYash Shah 397875f824SYash Shah gpio-controller: true 407875f824SYash Shah 417875f824SYash Shahrequired: 427875f824SYash Shah - compatible 437875f824SYash Shah - reg 447875f824SYash Shah - interrupts 457875f824SYash Shah - interrupt-controller 467875f824SYash Shah - "#interrupt-cells" 477875f824SYash Shah - clocks 487875f824SYash Shah - "#gpio-cells" 497875f824SYash Shah - gpio-controller 507875f824SYash Shah 517875f824SYash ShahadditionalProperties: false 527875f824SYash Shah 537875f824SYash Shahexamples: 547875f824SYash Shah - | 557875f824SYash Shah #include <dt-bindings/clock/sifive-fu540-prci.h> 567875f824SYash Shah gpio@10060000 { 577875f824SYash Shah compatible = "sifive,fu540-c000-gpio", "sifive,gpio0"; 587875f824SYash Shah interrupt-parent = <&plic>; 597875f824SYash Shah interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>; 607875f824SYash Shah reg = <0x0 0x10060000 0x0 0x1000>; 617875f824SYash Shah clocks = <&tlclk PRCI_CLK_TLCLK>; 627875f824SYash Shah gpio-controller; 637875f824SYash Shah #gpio-cells = <2>; 647875f824SYash Shah interrupt-controller; 657875f824SYash Shah #interrupt-cells = <2>; 667875f824SYash Shah }; 677875f824SYash Shah 687875f824SYash Shah... 69