1*951f7da9SSander Vanheule# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*951f7da9SSander Vanheule%YAML 1.2
3*951f7da9SSander Vanheule---
4*951f7da9SSander Vanheule$id: http://devicetree.org/schemas/gpio/realtek,otto-gpio.yaml#
5*951f7da9SSander Vanheule$schema: http://devicetree.org/meta-schemas/core.yaml#
6*951f7da9SSander Vanheule
7*951f7da9SSander Vanheuletitle: Realtek Otto GPIO controller
8*951f7da9SSander Vanheule
9*951f7da9SSander Vanheulemaintainers:
10*951f7da9SSander Vanheule  - Sander Vanheule <sander@svanheule.net>
11*951f7da9SSander Vanheule  - Bert Vermeulen <bert@biot.com>
12*951f7da9SSander Vanheule
13*951f7da9SSander Vanheuledescription: |
14*951f7da9SSander Vanheule  Realtek's GPIO controller on their MIPS switch SoCs (Otto platform) consists
15*951f7da9SSander Vanheule  of two banks of 32 GPIOs. These GPIOs can generate edge-triggered interrupts.
16*951f7da9SSander Vanheule  Each bank's interrupts are cascased into one interrupt line on the parent
17*951f7da9SSander Vanheule  interrupt controller, if provided.
18*951f7da9SSander Vanheule  This binding allows defining a single bank in the devicetree. The interrupt
19*951f7da9SSander Vanheule  controller is not supported on the fallback compatible name, which only
20*951f7da9SSander Vanheule  allows for GPIO port use.
21*951f7da9SSander Vanheule
22*951f7da9SSander Vanheuleproperties:
23*951f7da9SSander Vanheule  $nodename:
24*951f7da9SSander Vanheule    pattern: "^gpio@[0-9a-f]+$"
25*951f7da9SSander Vanheule
26*951f7da9SSander Vanheule  compatible:
27*951f7da9SSander Vanheule    items:
28*951f7da9SSander Vanheule      - enum:
29*951f7da9SSander Vanheule          - realtek,rtl8380-gpio
30*951f7da9SSander Vanheule          - realtek,rtl8390-gpio
31*951f7da9SSander Vanheule      - const: realtek,otto-gpio
32*951f7da9SSander Vanheule
33*951f7da9SSander Vanheule  reg:
34*951f7da9SSander Vanheule    maxItems: 1
35*951f7da9SSander Vanheule
36*951f7da9SSander Vanheule  "#gpio-cells":
37*951f7da9SSander Vanheule    const: 2
38*951f7da9SSander Vanheule
39*951f7da9SSander Vanheule  gpio-controller: true
40*951f7da9SSander Vanheule
41*951f7da9SSander Vanheule  ngpios:
42*951f7da9SSander Vanheule    minimum: 1
43*951f7da9SSander Vanheule    maximum: 32
44*951f7da9SSander Vanheule
45*951f7da9SSander Vanheule  interrupt-controller: true
46*951f7da9SSander Vanheule
47*951f7da9SSander Vanheule  "#interrupt-cells":
48*951f7da9SSander Vanheule    const: 2
49*951f7da9SSander Vanheule
50*951f7da9SSander Vanheule  interrupts:
51*951f7da9SSander Vanheule    maxItems: 1
52*951f7da9SSander Vanheule
53*951f7da9SSander Vanheulerequired:
54*951f7da9SSander Vanheule  - compatible
55*951f7da9SSander Vanheule  - reg
56*951f7da9SSander Vanheule  - "#gpio-cells"
57*951f7da9SSander Vanheule  - gpio-controller
58*951f7da9SSander Vanheule
59*951f7da9SSander VanheuleadditionalProperties: false
60*951f7da9SSander Vanheule
61*951f7da9SSander Vanheuledependencies:
62*951f7da9SSander Vanheule  interrupt-controller: [ interrupts ]
63*951f7da9SSander Vanheule
64*951f7da9SSander Vanheuleexamples:
65*951f7da9SSander Vanheule  - |
66*951f7da9SSander Vanheule      gpio@3500 {
67*951f7da9SSander Vanheule        compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio";
68*951f7da9SSander Vanheule        reg = <0x3500 0x1c>;
69*951f7da9SSander Vanheule        gpio-controller;
70*951f7da9SSander Vanheule        #gpio-cells = <2>;
71*951f7da9SSander Vanheule        ngpios = <24>;
72*951f7da9SSander Vanheule        interrupt-controller;
73*951f7da9SSander Vanheule        #interrupt-cells = <2>;
74*951f7da9SSander Vanheule        interrupt-parent = <&rtlintc>;
75*951f7da9SSander Vanheule        interrupts = <23>;
76*951f7da9SSander Vanheule      };
77*951f7da9SSander Vanheule
78*951f7da9SSander Vanheule...
79