1Specifying GPIO information for devices
2============================================
3
41) gpios property
5-----------------
6
7Nodes that makes use of GPIOs should specify them using one or more
8properties, each containing a 'gpio-list':
9
10	gpio-list ::= <single-gpio> [gpio-list]
11	single-gpio ::= <gpio-phandle> <gpio-specifier>
12	gpio-phandle : phandle to gpio controller node
13	gpio-specifier : Array of #gpio-cells specifying specific gpio
14			 (controller specific)
15
16GPIO properties should be named "[<name>-]gpios".  Exact
17meaning of each gpios property must be documented in the device tree
18binding for each device.
19
20For example, the following could be used to describe gpios pins to use
21as chip select lines; with chip selects 0, 1 and 3 populated, and chip
22select 2 left empty:
23
24	gpio1: gpio1 {
25		gpio-controller
26		 #gpio-cells = <2>;
27	};
28	gpio2: gpio2 {
29		gpio-controller
30		 #gpio-cells = <1>;
31	};
32	[...]
33	 chipsel-gpios = <&gpio1 12 0>,
34			 <&gpio1 13 0>,
35			 <0>, /* holes are permitted, means no GPIO 2 */
36			 <&gpio2 2>;
37
38Note that gpio-specifier length is controller dependent.  In the
39above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2
40only uses one.
41
42gpio-specifier may encode: bank, pin position inside the bank,
43whether pin is open-drain and whether pin is logically inverted.
44Exact meaning of each specifier cell is controller specific, and must
45be documented in the device tree binding for the device.
46
47Example of the node using GPIOs:
48
49	node {
50		gpios = <&qe_pio_e 18 0>;
51	};
52
53In this example gpio-specifier is "18 0" and encodes GPIO pin number,
54and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
55
562) gpio-controller nodes
57------------------------
58
59Every GPIO controller node must both an empty "gpio-controller"
60property, and have #gpio-cells contain the size of the gpio-specifier.
61
62Example of two SOC GPIO banks defined as gpio-controller nodes:
63
64	qe_pio_a: gpio-controller@1400 {
65		#gpio-cells = <2>;
66		compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
67		reg = <0x1400 0x18>;
68		gpio-controller;
69	};
70
71	qe_pio_e: gpio-controller@1460 {
72		#gpio-cells = <2>;
73		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
74		reg = <0x1460 0x18>;
75		gpio-controller;
76	};
77
78
79