145fe3fcaSAndrew F. DavisGeneric Parallel-in/Serial-out Shift Register GPIO Driver
245fe3fcaSAndrew F. Davis
345fe3fcaSAndrew F. DavisThis binding describes generic parallel-in/serial-out shift register
445fe3fcaSAndrew F. Davisdevices that can be used for GPI (General Purpose Input). This includes
545fe3fcaSAndrew F. DavisSN74165 serial-out shift registers and the SN65HVS88x series of
645fe3fcaSAndrew F. Davisindustrial serializers.
745fe3fcaSAndrew F. Davis
845fe3fcaSAndrew F. DavisRequired properties:
945fe3fcaSAndrew F. Davis - compatible		: Should be "pisosr-gpio".
1045fe3fcaSAndrew F. Davis - gpio-controller	: Marks the device node as a GPIO controller.
1145fe3fcaSAndrew F. Davis - #gpio-cells		: Should be two. For consumer use see gpio.txt.
1245fe3fcaSAndrew F. Davis
1345fe3fcaSAndrew F. DavisOptional properties:
1445fe3fcaSAndrew F. Davis - ngpios		: Number of used GPIO lines (0..n-1), default is 8.
1545fe3fcaSAndrew F. Davis - load-gpios		: GPIO pin specifier attached to load enable, this
1645fe3fcaSAndrew F. Davis			  pin is pulsed before reading from the device to
17*12e5bde1SSlark Xiao			  load input pin values into the device.
1845fe3fcaSAndrew F. Davis
1945fe3fcaSAndrew F. DavisFor other required and optional properties of SPI slave
2045fe3fcaSAndrew F. Davisnodes please refer to ../spi/spi-bus.txt.
2145fe3fcaSAndrew F. Davis
2245fe3fcaSAndrew F. DavisExample:
2345fe3fcaSAndrew F. Davis
2445fe3fcaSAndrew F. Davis	gpio@0 {
2545fe3fcaSAndrew F. Davis		compatible = "ti,sn65hvs882", "pisosr-gpio";
2645fe3fcaSAndrew F. Davis		gpio-controller;
2745fe3fcaSAndrew F. Davis		#gpio-cells = <2>;
2845fe3fcaSAndrew F. Davis
2945fe3fcaSAndrew F. Davis		load-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
3045fe3fcaSAndrew F. Davis
3145fe3fcaSAndrew F. Davis		reg = <0>;
3245fe3fcaSAndrew F. Davis		spi-max-frequency = <1000000>;
3345fe3fcaSAndrew F. Davis		spi-cpol;
3445fe3fcaSAndrew F. Davis	};
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