1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Marvell EBU GPIO controller 8 9maintainers: 10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 - Andrew Lunn <andrew@lunn.ch> 12 13properties: 14 compatible: 15 oneOf: 16 - enum: 17 - marvell,armada-8k-gpio 18 - marvell,orion-gpio 19 20 - items: 21 - enum: 22 - marvell,mv78200-gpio 23 - marvell,armada-370-gpio 24 - const: marvell,orion-gpio 25 26 - description: Deprecated binding 27 items: 28 - const: marvell,armadaxp-gpio 29 - const: marvell,orion-gpio 30 deprecated: true 31 32 reg: 33 description: | 34 Address and length of the register set for the device. Not used for 35 marvell,armada-8k-gpio. 36 37 A second entry can be provided, for the PWM function using the GPIO Blink 38 Counter on/off registers. 39 minItems: 1 40 maxItems: 2 41 42 reg-names: 43 items: 44 - const: gpio 45 - const: pwm 46 minItems: 1 47 48 interrupts: 49 description: | 50 The list of interrupts that are used for all the pins managed by this 51 GPIO bank. There can be more than one interrupt (example: 1 interrupt 52 per 8 pins on Armada XP, which means 4 interrupts per bank of 32 53 GPIOs). 54 minItems: 1 55 maxItems: 4 56 57 interrupt-controller: true 58 59 "#interrupt-cells": 60 const: 2 61 62 gpio-controller: true 63 64 ngpios: 65 minimum: 1 66 maximum: 32 67 68 "#gpio-cells": 69 const: 2 70 71 "#pwm-cells": 72 description: 73 The first cell is the GPIO line number. The second cell is the period 74 in nanoseconds. 75 const: 2 76 77 clocks: 78 description: 79 Clock(s) used for PWM function. 80 items: 81 - description: Core clock 82 - description: AXI bus clock 83 minItems: 1 84 85 clock-names: 86 items: 87 - const: core 88 - const: axi 89 minItems: 1 90 91required: 92 - compatible 93 - gpio-controller 94 - ngpios 95 - "#gpio-cells" 96 97allOf: 98 - if: 99 properties: 100 compatible: 101 contains: 102 const: marvell,armada-8k-gpio 103 then: 104 required: 105 - offset 106 else: 107 required: 108 - reg 109 110unevaluatedProperties: true 111 112examples: 113 - | 114 gpio@d0018100 { 115 compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio"; 116 reg = <0xd0018100 0x40>, <0xd0018800 0x30>; 117 ngpios = <32>; 118 gpio-controller; 119 #gpio-cells = <2>; 120 interrupt-controller; 121 #interrupt-cells = <2>; 122 interrupts = <16>, <17>, <18>, <19>; 123 }; 124 125 - | 126 gpio@18140 { 127 compatible = "marvell,armada-370-gpio", "marvell,orion-gpio"; 128 reg = <0x18140 0x40>, <0x181c8 0x08>; 129 reg-names = "gpio", "pwm"; 130 ngpios = <17>; 131 gpio-controller; 132 #gpio-cells = <2>; 133 #pwm-cells = <2>; 134 interrupt-controller; 135 #interrupt-cells = <2>; 136 interrupts = <87>, <88>, <89>; 137 clocks = <&coreclk 0>; 138 }; 139