1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Marvell EBU GPIO controller
8
9maintainers:
10  - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11  - Andrew Lunn <andrew@lunn.ch>
12
13properties:
14  compatible:
15    oneOf:
16      - enum:
17          - marvell,armada-8k-gpio
18          - marvell,orion-gpio
19
20      - items:
21          - enum:
22              - marvell,mv78200-gpio
23              - marvell,armada-370-gpio
24              - marvell,armadaxp-gpio
25          - const: marvell,orion-gpio
26
27  reg:
28    description: |
29      Address and length of the register set for the device. Not used for
30      marvell,armada-8k-gpio.
31
32      For the "marvell,armadaxp-gpio" variant a second entry is expected for
33      the per-cpu registers. For other variants second entry can be provided,
34      for the PWM function using the GPIO Blink Counter on/off registers.
35    minItems: 1
36    maxItems: 2
37
38  reg-names:
39    items:
40      - const: gpio
41      - const: pwm
42    minItems: 1
43
44  interrupts:
45    description: |
46      The list of interrupts that are used for all the pins managed by this
47      GPIO bank. There can be more than one interrupt (example: 1 interrupt
48      per 8 pins on Armada XP, which means 4 interrupts per bank of 32
49      GPIOs).
50    minItems: 1
51    maxItems: 4
52
53  interrupt-controller: true
54
55  "#interrupt-cells":
56    const: 2
57
58  gpio-controller: true
59
60  ngpios:
61    minimum: 1
62    maximum: 32
63
64  "#gpio-cells":
65    const: 2
66
67  "#pwm-cells":
68    description:
69      The first cell is the GPIO line number. The second cell is the period
70      in nanoseconds.
71    const: 2
72
73  clocks:
74    description:
75      Clock(s) used for PWM function.
76    items:
77      - description: Core clock
78      - description: AXI bus clock
79    minItems: 1
80
81  clock-names:
82    items:
83      - const: core
84      - const: axi
85    minItems: 1
86
87required:
88  - compatible
89  - gpio-controller
90  - ngpios
91  - "#gpio-cells"
92
93allOf:
94  - if:
95      properties:
96        compatible:
97          contains:
98            const: marvell,armada-8k-gpio
99    then:
100      required:
101        - offset
102    else:
103      required:
104        - reg
105
106  - if:
107      properties:
108        compatible:
109          contains:
110            const: marvell,armadaxp-gpio
111    then:
112      properties:
113        reg:
114          minItems: 2
115        reg-names:
116          minItems: 2
117
118unevaluatedProperties: true
119
120examples:
121  - |
122    gpio@d0018100 {
123      compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio";
124      reg = <0xd0018100 0x40>, <0xd0018800 0x30>;
125      ngpios = <32>;
126      gpio-controller;
127      #gpio-cells = <2>;
128      interrupt-controller;
129      #interrupt-cells = <2>;
130      interrupts = <16>, <17>, <18>, <19>;
131    };
132
133  - |
134    gpio@18140 {
135      compatible = "marvell,armada-370-gpio", "marvell,orion-gpio";
136      reg = <0x18140 0x40>, <0x181c8 0x08>;
137      reg-names = "gpio", "pwm";
138      ngpios = <17>;
139      gpio-controller;
140      #gpio-cells = <2>;
141      #pwm-cells = <2>;
142      interrupt-controller;
143      #interrupt-cells = <2>;
144      interrupts = <87>, <88>, <89>;
145      clocks = <&coreclk 0>;
146    };
147