1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc-gpio.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom XGS iProc GPIO controller
8
9maintainers:
10  - Chris Packham <chris.packham@alliedtelesis.co.nz>
11
12description: |
13  This controller is the Chip Common A GPIO present on a number of Broadcom
14  switch ASICs with integrated SoCs.
15
16properties:
17  compatible:
18    const: brcm,iproc-gpio-cca
19
20  reg:
21    items:
22      - description: the I/O address containing the GPIO controller
23                     registers.
24      - description: the I/O address containing the Chip Common A interrupt
25                     registers.
26
27  gpio-controller: true
28
29  '#gpio-cells':
30      const: 2
31
32  ngpios:
33    minimum: 0
34    maximum: 32
35
36  interrupt-controller: true
37
38  '#interrupt-cells':
39    const: 2
40
41  interrupts:
42    maxItems: 1
43
44required:
45  - compatible
46  - reg
47  - "#gpio-cells"
48  - gpio-controller
49
50additionalProperties: false
51
52dependencies:
53  interrupt-controller: [ interrupts ]
54
55examples:
56  - |
57    #include <dt-bindings/interrupt-controller/irq.h>
58    #include <dt-bindings/interrupt-controller/arm-gic.h>
59    gpio@18000060 {
60        compatible = "brcm,iproc-gpio-cca";
61        #gpio-cells = <2>;
62        reg = <0x18000060 0x50>,
63              <0x18000000 0x50>;
64        ngpios = <12>;
65        gpio-controller;
66        interrupt-controller;
67        #interrupt-cells = <2>;
68        interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
69    };
70
71
72...
73