1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: QCOM Secure Channel Manager (SCM) 8 9description: | 10 Qualcomm processors include an interface to communicate to the secure firmware. 11 This interface allows for clients to request different types of actions. 12 These can include CPU power up/down, HDCP requests, loading of firmware, 13 and other assorted actions. 14 15maintainers: 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 19 20properties: 21 compatible: 22 items: 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 27 - qcom,scm-ipq5332 28 - qcom,scm-ipq6018 29 - qcom,scm-ipq806x 30 - qcom,scm-ipq8074 31 - qcom,scm-ipq9574 32 - qcom,scm-mdm9607 33 - qcom,scm-msm8226 34 - qcom,scm-msm8660 35 - qcom,scm-msm8916 36 - qcom,scm-msm8953 37 - qcom,scm-msm8960 38 - qcom,scm-msm8974 39 - qcom,scm-msm8976 40 - qcom,scm-msm8994 41 - qcom,scm-msm8996 42 - qcom,scm-msm8998 43 - qcom,scm-qcm2290 44 - qcom,scm-qdu1000 45 - qcom,scm-sa8775p 46 - qcom,scm-sc7180 47 - qcom,scm-sc7280 48 - qcom,scm-sc8180x 49 - qcom,scm-sc8280xp 50 - qcom,scm-sdm670 51 - qcom,scm-sdm845 52 - qcom,scm-sdx55 53 - qcom,scm-sdx65 54 - qcom,scm-sm6115 55 - qcom,scm-sm6125 56 - qcom,scm-sm6350 57 - qcom,scm-sm6375 58 - qcom,scm-sm8150 59 - qcom,scm-sm8250 60 - qcom,scm-sm8350 61 - qcom,scm-sm8450 62 - qcom,scm-sm8550 63 - qcom,scm-qcs404 64 - const: qcom,scm 65 66 clocks: 67 minItems: 1 68 maxItems: 3 69 70 clock-names: 71 minItems: 1 72 maxItems: 3 73 74 interconnects: 75 maxItems: 1 76 77 interconnect-names: 78 maxItems: 1 79 80 '#reset-cells': 81 const: 1 82 83 interrupts: 84 description: 85 The wait-queue interrupt that firmware raises as part of handshake 86 protocol to handle sleeping SCM calls. 87 maxItems: 1 88 89 qcom,dload-mode: 90 $ref: /schemas/types.yaml#/definitions/phandle-array 91 items: 92 - items: 93 - description: phandle to TCSR hardware block 94 - description: offset of the download mode control register 95 description: TCSR hardware block 96 97allOf: 98 # Clocks 99 - if: 100 properties: 101 compatible: 102 contains: 103 enum: 104 - qcom,scm-apq8064 105 - qcom,scm-apq8084 106 - qcom,scm-mdm9607 107 - qcom,scm-msm8226 108 - qcom,scm-msm8660 109 - qcom,scm-msm8916 110 - qcom,scm-msm8953 111 - qcom,scm-msm8960 112 - qcom,scm-msm8974 113 - qcom,scm-msm8976 114 - qcom,scm-qcm2290 115 - qcom,scm-sm6375 116 then: 117 required: 118 - clocks 119 - clock-names 120 else: 121 properties: 122 clock-names: false 123 clocks: false 124 125 - if: 126 properties: 127 compatible: 128 contains: 129 enum: 130 - qcom,scm-apq8064 131 - qcom,scm-msm8660 132 - qcom,scm-msm8960 133 - qcom,scm-qcm2290 134 - qcom,scm-sm6375 135 then: 136 properties: 137 clock-names: 138 items: 139 - const: core 140 141 clocks: 142 maxItems: 1 143 144 - if: 145 properties: 146 compatible: 147 contains: 148 enum: 149 - qcom,scm-apq8084 150 - qcom,scm-mdm9607 151 - qcom,scm-msm8226 152 - qcom,scm-msm8916 153 - qcom,scm-msm8953 154 - qcom,scm-msm8974 155 - qcom,scm-msm8976 156 then: 157 properties: 158 clock-names: 159 items: 160 - const: core 161 - const: bus 162 - const: iface 163 164 clocks: 165 minItems: 3 166 maxItems: 3 167 168 # Interconnects 169 - if: 170 not: 171 properties: 172 compatible: 173 contains: 174 enum: 175 - qcom,scm-qdu1000 176 - qcom,scm-sm8450 177 - qcom,scm-sm8550 178 then: 179 properties: 180 interconnects: false 181 182 # Interrupts 183 - if: 184 not: 185 properties: 186 compatible: 187 contains: 188 enum: 189 - qcom,scm-sm8450 190 - qcom,scm-sm8550 191 then: 192 properties: 193 interrupts: false 194 195required: 196 - compatible 197 198additionalProperties: false 199 200examples: 201 - | 202 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 203 204 firmware { 205 scm { 206 compatible = "qcom,scm-msm8916", "qcom,scm"; 207 clocks = <&gcc GCC_CRYPTO_CLK>, 208 <&gcc GCC_CRYPTO_AXI_CLK>, 209 <&gcc GCC_CRYPTO_AHB_CLK>; 210 clock-names = "core", "bus", "iface"; 211 }; 212 }; 213