1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: QCOM Secure Channel Manager (SCM) 8 9description: | 10 Qualcomm processors include an interface to communicate to the secure firmware. 11 This interface allows for clients to request different types of actions. 12 These can include CPU power up/down, HDCP requests, loading of firmware, 13 and other assorted actions. 14 15maintainers: 16 - Bjorn Andersson <bjorn.andersson@linaro.org> 17 - Robert Marko <robimarko@gmail.com> 18 - Guru Das Srinagesh <quic_gurus@quicinc.com> 19 20properties: 21 compatible: 22 items: 23 - enum: 24 - qcom,scm-apq8064 25 - qcom,scm-apq8084 26 - qcom,scm-ipq4019 27 - qcom,scm-ipq5332 28 - qcom,scm-ipq6018 29 - qcom,scm-ipq806x 30 - qcom,scm-ipq8074 31 - qcom,scm-ipq9574 32 - qcom,scm-mdm9607 33 - qcom,scm-msm8226 34 - qcom,scm-msm8660 35 - qcom,scm-msm8916 36 - qcom,scm-msm8953 37 - qcom,scm-msm8960 38 - qcom,scm-msm8974 39 - qcom,scm-msm8976 40 - qcom,scm-msm8994 41 - qcom,scm-msm8996 42 - qcom,scm-msm8998 43 - qcom,scm-qcm2290 44 - qcom,scm-qdu1000 45 - qcom,scm-sa8775p 46 - qcom,scm-sc7180 47 - qcom,scm-sc7280 48 - qcom,scm-sc8180x 49 - qcom,scm-sc8280xp 50 - qcom,scm-sdm670 51 - qcom,scm-sdm845 52 - qcom,scm-sdx55 53 - qcom,scm-sdx65 54 - qcom,scm-sdx75 55 - qcom,scm-sm6115 56 - qcom,scm-sm6125 57 - qcom,scm-sm6350 58 - qcom,scm-sm6375 59 - qcom,scm-sm8150 60 - qcom,scm-sm8250 61 - qcom,scm-sm8350 62 - qcom,scm-sm8450 63 - qcom,scm-sm8550 64 - qcom,scm-qcs404 65 - const: qcom,scm 66 67 clocks: 68 minItems: 1 69 maxItems: 3 70 71 clock-names: 72 minItems: 1 73 maxItems: 3 74 75 dma-coherent: true 76 77 interconnects: 78 maxItems: 1 79 80 interconnect-names: 81 maxItems: 1 82 83 '#reset-cells': 84 const: 1 85 86 interrupts: 87 description: 88 The wait-queue interrupt that firmware raises as part of handshake 89 protocol to handle sleeping SCM calls. 90 maxItems: 1 91 92 qcom,dload-mode: 93 $ref: /schemas/types.yaml#/definitions/phandle-array 94 items: 95 - items: 96 - description: phandle to TCSR hardware block 97 - description: offset of the download mode control register 98 description: TCSR hardware block 99 100allOf: 101 # Clocks 102 - if: 103 properties: 104 compatible: 105 contains: 106 enum: 107 - qcom,scm-apq8064 108 - qcom,scm-apq8084 109 - qcom,scm-mdm9607 110 - qcom,scm-msm8226 111 - qcom,scm-msm8660 112 - qcom,scm-msm8916 113 - qcom,scm-msm8953 114 - qcom,scm-msm8960 115 - qcom,scm-msm8974 116 - qcom,scm-msm8976 117 - qcom,scm-qcm2290 118 - qcom,scm-sm6375 119 then: 120 required: 121 - clocks 122 - clock-names 123 else: 124 properties: 125 clock-names: false 126 clocks: false 127 128 - if: 129 properties: 130 compatible: 131 contains: 132 enum: 133 - qcom,scm-apq8064 134 - qcom,scm-msm8660 135 - qcom,scm-msm8960 136 - qcom,scm-qcm2290 137 - qcom,scm-sm6375 138 then: 139 properties: 140 clock-names: 141 items: 142 - const: core 143 144 clocks: 145 maxItems: 1 146 147 - if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,scm-apq8084 153 - qcom,scm-mdm9607 154 - qcom,scm-msm8226 155 - qcom,scm-msm8916 156 - qcom,scm-msm8953 157 - qcom,scm-msm8974 158 - qcom,scm-msm8976 159 then: 160 properties: 161 clock-names: 162 items: 163 - const: core 164 - const: bus 165 - const: iface 166 167 clocks: 168 minItems: 3 169 maxItems: 3 170 171 # Interconnects 172 - if: 173 not: 174 properties: 175 compatible: 176 contains: 177 enum: 178 - qcom,scm-qdu1000 179 - qcom,scm-sm8450 180 - qcom,scm-sm8550 181 then: 182 properties: 183 interconnects: false 184 185 # Interrupts 186 - if: 187 not: 188 properties: 189 compatible: 190 contains: 191 enum: 192 - qcom,scm-sm8450 193 - qcom,scm-sm8550 194 then: 195 properties: 196 interrupts: false 197 198required: 199 - compatible 200 201additionalProperties: false 202 203examples: 204 - | 205 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 206 207 firmware { 208 scm { 209 compatible = "qcom,scm-msm8916", "qcom,scm"; 210 clocks = <&gcc GCC_CRYPTO_CLK>, 211 <&gcc GCC_CRYPTO_AXI_CLK>, 212 <&gcc GCC_CRYPTO_AHB_CLK>; 213 clock-names = "core", "bus", "iface"; 214 }; 215 }; 216