1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/edac/amazon,al-mc-edac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amazon's Annapurna Labs Memory Controller EDAC
8
9maintainers:
10  - Talel Shenhar <talel@amazon.com>
11  - Talel Shenhar <talelshenhar@gmail.com>
12
13description: |
14  EDAC node is defined to describe on-chip error detection and correction for
15  Amazon's Annapurna Labs Memory Controller.
16
17properties:
18
19  compatible:
20    const: amazon,al-mc-edac
21
22  reg:
23    maxItems: 1
24
25  "#address-cells":
26    const: 2
27
28  "#size-cells":
29    const: 2
30
31  interrupts:
32    minItems: 1
33    maxItems: 2
34    items:
35      - description: uncorrectable error interrupt
36      - description: correctable error interrupt
37
38  interrupt-names:
39    minItems: 1
40    maxItems: 2
41    items:
42      - const: ue
43      - const: ce
44
45required:
46  - compatible
47  - reg
48  - "#address-cells"
49  - "#size-cells"
50
51
52examples:
53  - |
54    #include <dt-bindings/interrupt-controller/irq.h>
55    soc {
56        #address-cells = <2>;
57        #size-cells = <2>;
58        edac@f0080000 {
59          #address-cells = <2>;
60          #size-cells = <2>;
61          compatible = "amazon,al-mc-edac";
62          reg = <0x0 0xf0080000 0x0 0x00010000>;
63          interrupt-parent = <&amazon_al_system_fabric>;
64          interrupt-names = "ue";
65          interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
66        };
67    };
68