1Xilinx AXI VDMA engine, it does transfers between memory and video devices.
2It can be configured to have one channel or two channels. If configured
3as two channels, one is to transmit to the video device and another is
4to receive from the video device.
5
6Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
7target devices. It can be configured to have one channel or two channels.
8If configured as two channels, one is to transmit to the device and another
9is to receive from the device.
10
11Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12address and a memory-mapped destination address.
13
14Required properties:
15- compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" or
16	      "xlnx,axi-cdma-1.00.a""
17- #dma-cells: Should be <1>, see "dmas" property below
18- reg: Should contain VDMA registers location and length.
19- xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
20- dma-ranges: Should be as the following <dma_addr cpu_addr max_len>.
21- dma-channel child node: Should have at least one channel and can have up to
22	two channels per device. This node specifies the properties of each
23	DMA channel (see child node properties below).
24- clocks: Input clock specifier. Refer to common clock bindings.
25- clock-names: List of input clocks
26	For VDMA:
27	Required elements: "s_axi_lite_aclk"
28	Optional elements: "m_axi_mm2s_aclk" "m_axi_s2mm_aclk",
29			   "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"
30	For CDMA:
31	Required elements: "s_axi_lite_aclk", "m_axi_aclk"
32	FOR AXIDMA:
33	Required elements: "s_axi_lite_aclk"
34	Optional elements: "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
35			   "m_axi_sg_aclk"
36
37Required properties for VDMA:
38- xlnx,num-fstores: Should be the number of framebuffers as configured in h/w.
39
40Optional properties:
41- xlnx,include-sg: Tells configured for Scatter-mode in
42	the hardware.
43Optional properties for AXI DMA:
44- xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
45Optional properties for VDMA:
46- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
47	It takes following values:
48	{1}, flush both channels
49	{2}, flush mm2s channel
50	{3}, flush s2mm channel
51
52Required child node properties:
53- compatible: It should be either "xlnx,axi-vdma-mm2s-channel" or
54	"xlnx,axi-vdma-s2mm-channel".
55- interrupts: Should contain per channel VDMA interrupts.
56- xlnx,datawidth: Should contain the stream data width, take values
57	{32,64...1024}.
58
59Optional child node properties:
60- xlnx,include-dre: Tells hardware is configured for Data
61	Realignment Engine.
62Optional child node properties for VDMA:
63- xlnx,genlock-mode: Tells Genlock synchronization is
64	enabled/disabled in hardware.
65Optional child node properties for AXI DMA:
66-dma-channels: Number of dma channels in child node.
67
68Example:
69++++++++
70
71axi_vdma_0: axivdma@40030000 {
72	compatible = "xlnx,axi-vdma-1.00.a";
73	#dma_cells = <1>;
74	reg = < 0x40030000 0x10000 >;
75	dma-ranges = <0x00000000 0x00000000 0x40000000>;
76	xlnx,num-fstores = <0x8>;
77	xlnx,flush-fsync = <0x1>;
78	xlnx,addrwidth = <0x20>;
79	clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>;
80	clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk",
81		      "m_axis_mm2s_aclk", "s_axis_s2mm_aclk";
82	dma-channel@40030000 {
83		compatible = "xlnx,axi-vdma-mm2s-channel";
84		interrupts = < 0 54 4 >;
85		xlnx,datawidth = <0x40>;
86	} ;
87	dma-channel@40030030 {
88		compatible = "xlnx,axi-vdma-s2mm-channel";
89		interrupts = < 0 53 4 >;
90		xlnx,datawidth = <0x40>;
91	} ;
92} ;
93
94
95* DMA client
96
97Required properties:
98- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
99	where Channel ID is '0' for write/tx and '1' for read/rx
100	channel.
101- dma-names: a list of DMA channel names, one per "dmas" entry
102
103Example:
104++++++++
105
106vdmatest_0: vdmatest@0 {
107	compatible ="xlnx,axi-vdma-test-1.00.a";
108	dmas = <&axi_vdma_0 0
109		&axi_vdma_0 1>;
110	dma-names = "vdma0", "vdma1";
111} ;
112