1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/socionext,uniphier-xdmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier external DMA controller
8
9description: |
10  This describes the devicetree bindings for an external DMA engine to perform
11  memory-to-memory or peripheral-to-memory data transfer capable of supporting
12  16 channels, implemented in Socionext UniPhier SoCs.
13
14maintainers:
15  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
16
17allOf:
18  - $ref: "dma-controller.yaml#"
19
20properties:
21  compatible:
22    const: socionext,uniphier-xdmac
23
24  reg:
25    items:
26      - description: XDMAC base register region (offset and length)
27      - description: XDMAC extension register region (offset and length)
28
29  interrupts:
30    maxItems: 1
31
32  "#dma-cells":
33    const: 2
34    description: |
35      DMA request from clients consists of 2 cells:
36        1. Channel index
37        2. Transfer request factor number, If no transfer factor, use 0.
38           The number is SoC-specific, and this should be specified with
39           relation to the device to use the DMA controller.
40
41  dma-channels:
42    minimum: 1
43    maximum: 16
44
45additionalProperties: false
46
47required:
48  - compatible
49  - reg
50  - interrupts
51  - "#dma-cells"
52
53examples:
54  - |
55    xdmac: dma-controller@5fc10000 {
56        compatible = "socionext,uniphier-xdmac";
57        reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
58        interrupts = <0 188 4>;
59        #dma-cells = <2>;
60        dma-channels = <16>;
61    };
62
63...
64