19b9b1253SBiju Das# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 29b9b1253SBiju Das%YAML 1.2 39b9b1253SBiju Das--- 49b9b1253SBiju Das$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# 59b9b1253SBiju Das$schema: http://devicetree.org/meta-schemas/core.yaml# 69b9b1253SBiju Das 7614c8becSBiju Dastitle: Renesas RZ/{G2L,G2UL,V2L} DMA Controller 89b9b1253SBiju Das 99b9b1253SBiju Dasmaintainers: 109b9b1253SBiju Das - Biju Das <biju.das.jz@bp.renesas.com> 119b9b1253SBiju Das 129b9b1253SBiju DasallOf: 1310cafa2dSKrzysztof Kozlowski - $ref: dma-controller.yaml# 149b9b1253SBiju Das 159b9b1253SBiju Dasproperties: 169b9b1253SBiju Das compatible: 179b9b1253SBiju Das items: 189b9b1253SBiju Das - enum: 19614c8becSBiju Das - renesas,r9a07g043-dmac # RZ/G2UL 209b9b1253SBiju Das - renesas,r9a07g044-dmac # RZ/G2{L,LC} 2112bf2f9fSBiju Das - renesas,r9a07g054-dmac # RZ/V2L 229b9b1253SBiju Das - const: renesas,rz-dmac 239b9b1253SBiju Das 249b9b1253SBiju Das reg: 259b9b1253SBiju Das items: 269b9b1253SBiju Das - description: Control and channel register block 279b9b1253SBiju Das - description: DMA extended resource selector block 289b9b1253SBiju Das 299b9b1253SBiju Das interrupts: 309b9b1253SBiju Das maxItems: 17 319b9b1253SBiju Das 329b9b1253SBiju Das interrupt-names: 339b9b1253SBiju Das items: 349b9b1253SBiju Das - const: error 359b9b1253SBiju Das - const: ch0 369b9b1253SBiju Das - const: ch1 379b9b1253SBiju Das - const: ch2 389b9b1253SBiju Das - const: ch3 399b9b1253SBiju Das - const: ch4 409b9b1253SBiju Das - const: ch5 419b9b1253SBiju Das - const: ch6 429b9b1253SBiju Das - const: ch7 439b9b1253SBiju Das - const: ch8 449b9b1253SBiju Das - const: ch9 459b9b1253SBiju Das - const: ch10 469b9b1253SBiju Das - const: ch11 479b9b1253SBiju Das - const: ch12 489b9b1253SBiju Das - const: ch13 499b9b1253SBiju Das - const: ch14 509b9b1253SBiju Das - const: ch15 519b9b1253SBiju Das 529b9b1253SBiju Das clocks: 539b9b1253SBiju Das items: 549b9b1253SBiju Das - description: DMA main clock 559b9b1253SBiju Das - description: DMA register access clock 569b9b1253SBiju Das 57*5aaf9079SBiju Das clock-names: 58*5aaf9079SBiju Das items: 59*5aaf9079SBiju Das - const: main 60*5aaf9079SBiju Das - const: register 61*5aaf9079SBiju Das 629b9b1253SBiju Das '#dma-cells': 639b9b1253SBiju Das const: 1 649b9b1253SBiju Das description: 659b9b1253SBiju Das The cell specifies the encoded MID/RID values of the DMAC port 669b9b1253SBiju Das connected to the DMA client and the slave channel configuration 679b9b1253SBiju Das parameters. 689b9b1253SBiju Das bits[0:9] - Specifies MID/RID value 699b9b1253SBiju Das bit[10] - Specifies DMA request high enable (HIEN) 709b9b1253SBiju Das bit[11] - Specifies DMA request detection type (LVL) 719b9b1253SBiju Das bits[12:14] - Specifies DMAACK output mode (AM) 729b9b1253SBiju Das bit[15] - Specifies Transfer Mode (TM) 739b9b1253SBiju Das 749b9b1253SBiju Das dma-channels: 759b9b1253SBiju Das const: 16 769b9b1253SBiju Das 779b9b1253SBiju Das power-domains: 789b9b1253SBiju Das maxItems: 1 799b9b1253SBiju Das 809b9b1253SBiju Das resets: 819b9b1253SBiju Das items: 829b9b1253SBiju Das - description: Reset for DMA ARESETN reset terminal 839b9b1253SBiju Das - description: Reset for DMA RST_ASYNC reset terminal 849b9b1253SBiju Das 85*5aaf9079SBiju Das reset-names: 86*5aaf9079SBiju Das items: 87*5aaf9079SBiju Das - const: arst 88*5aaf9079SBiju Das - const: rst_async 89*5aaf9079SBiju Das 909b9b1253SBiju Dasrequired: 919b9b1253SBiju Das - compatible 929b9b1253SBiju Das - reg 939b9b1253SBiju Das - interrupts 949b9b1253SBiju Das - interrupt-names 959b9b1253SBiju Das - clocks 96*5aaf9079SBiju Das - clock-names 979b9b1253SBiju Das - '#dma-cells' 989b9b1253SBiju Das - dma-channels 999b9b1253SBiju Das - power-domains 1009b9b1253SBiju Das - resets 101*5aaf9079SBiju Das - reset-names 1029b9b1253SBiju Das 1039b9b1253SBiju DasadditionalProperties: false 1049b9b1253SBiju Das 1059b9b1253SBiju Dasexamples: 1069b9b1253SBiju Das - | 1079b9b1253SBiju Das #include <dt-bindings/interrupt-controller/arm-gic.h> 1089b9b1253SBiju Das #include <dt-bindings/clock/r9a07g044-cpg.h> 1099b9b1253SBiju Das 1109b9b1253SBiju Das dmac: dma-controller@11820000 { 1119b9b1253SBiju Das compatible = "renesas,r9a07g044-dmac", 1129b9b1253SBiju Das "renesas,rz-dmac"; 1139b9b1253SBiju Das reg = <0x11820000 0x10000>, 1149b9b1253SBiju Das <0x11830000 0x10000>; 1159b9b1253SBiju Das interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 1169b9b1253SBiju Das <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 1179b9b1253SBiju Das <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 1189b9b1253SBiju Das <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 1199b9b1253SBiju Das <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 1209b9b1253SBiju Das <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 1219b9b1253SBiju Das <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 1229b9b1253SBiju Das <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 1239b9b1253SBiju Das <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 1249b9b1253SBiju Das <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 1259b9b1253SBiju Das <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 1269b9b1253SBiju Das <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 1279b9b1253SBiju Das <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 1289b9b1253SBiju Das <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 1299b9b1253SBiju Das <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 1309b9b1253SBiju Das <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 1319b9b1253SBiju Das <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>; 1329b9b1253SBiju Das interrupt-names = "error", 1339b9b1253SBiju Das "ch0", "ch1", "ch2", "ch3", 1349b9b1253SBiju Das "ch4", "ch5", "ch6", "ch7", 1359b9b1253SBiju Das "ch8", "ch9", "ch10", "ch11", 1369b9b1253SBiju Das "ch12", "ch13", "ch14", "ch15"; 1379b9b1253SBiju Das clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>, 1389b9b1253SBiju Das <&cpg CPG_MOD R9A07G044_DMAC_PCLK>; 139*5aaf9079SBiju Das clock-names = "main", "register"; 1409b9b1253SBiju Das power-domains = <&cpg>; 1419b9b1253SBiju Das resets = <&cpg R9A07G044_DMAC_ARESETN>, 1429b9b1253SBiju Das <&cpg R9A07G044_DMAC_RST_ASYNC>; 143*5aaf9079SBiju Das reset-names = "arst", "rst_async"; 1449b9b1253SBiju Das #dma-cells = <1>; 1459b9b1253SBiju Das dma-channels = <16>; 1469b9b1253SBiju Das }; 147