1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies Inc GPI DMA controller
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12description: |
13  QCOM GPI DMA controller provides DMA capabilities for
14  peripheral buses such as I2C, UART, and SPI.
15
16allOf:
17  - $ref: dma-controller.yaml#
18
19properties:
20  compatible:
21    oneOf:
22      - enum:
23          - qcom,sdm845-gpi-dma
24          - qcom,sm6350-gpi-dma
25      - items:
26          - enum:
27              - qcom,qdu1000-gpi-dma
28              - qcom,sc7280-gpi-dma
29              - qcom,sm6115-gpi-dma
30              - qcom,sm6375-gpi-dma
31              - qcom,sm8350-gpi-dma
32              - qcom,sm8450-gpi-dma
33              - qcom,sm8550-gpi-dma
34          - const: qcom,sm6350-gpi-dma
35      - items:
36          - enum:
37              - qcom,sdm670-gpi-dma
38              - qcom,sm6125-gpi-dma
39              - qcom,sm8150-gpi-dma
40              - qcom,sm8250-gpi-dma
41          - const: qcom,sdm845-gpi-dma
42
43  reg:
44    maxItems: 1
45
46  interrupts:
47    description:
48      Interrupt lines for each GPI instance
49    minItems: 1
50    maxItems: 13
51
52  "#dma-cells":
53    const: 3
54    description: >
55      DMA clients must use the format described in dma.txt, giving a phandle
56      to the DMA controller plus the following 3 integer cells:
57      - channel: if set to 0xffffffff, any available channel will be allocated
58        for the client. Otherwise, the exact channel specified will be used.
59      - seid: serial id of the client as defined in the SoC documentation.
60      - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
61
62  iommus:
63    maxItems: 1
64
65  dma-channels:
66    maximum: 31
67
68  dma-channel-mask:
69    maxItems: 1
70
71required:
72  - compatible
73  - reg
74  - interrupts
75  - "#dma-cells"
76  - iommus
77  - dma-channels
78  - dma-channel-mask
79
80additionalProperties: false
81
82examples:
83  - |
84    #include <dt-bindings/interrupt-controller/arm-gic.h>
85    #include <dt-bindings/dma/qcom-gpi.h>
86    gpi_dma0: dma-controller@800000 {
87        compatible = "qcom,sdm845-gpi-dma";
88        #dma-cells = <3>;
89        reg = <0x00800000 0x60000>;
90        iommus = <&apps_smmu 0x0016 0x0>;
91        dma-channels = <13>;
92        dma-channel-mask = <0xfa>;
93        interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
94                     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
95                     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
96                     <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
97                     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
98                     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
99                     <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
100                     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
101                     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
102                     <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
103                     <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
104                     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
105                     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
106    };
107
108...
109