1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra Audio DMA (ADMA) controller
8
9description: |
10  The Tegra Audio DMA controller is used for transferring data
11  between system memory and the Audio Processing Engine (APE).
12
13maintainers:
14  - Jon Hunter <jonathanh@nvidia.com>
15
16allOf:
17  - $ref: "dma-controller.yaml#"
18
19properties:
20  compatible:
21    oneOf:
22      - enum:
23          - nvidia,tegra210-adma
24          - nvidia,tegra186-adma
25      - items:
26          - const: nvidia,tegra194-adma
27          - const: nvidia,tegra186-adma
28
29  reg:
30    maxItems: 1
31
32  interrupts:
33    description: |
34      Should contain all of the per-channel DMA interrupts in
35      ascending order with respect to the DMA channel index.
36    minItems: 1
37    maxItems: 32
38
39  clocks:
40    description: Must contain one entry for the ADMA module clock
41    maxItems: 1
42
43  clock-names:
44    const: d_audio
45
46  "#dma-cells":
47    description: |
48      The first cell denotes the receive/transmit request number and
49      should be between 1 and the maximum number of requests supported.
50      This value corresponds to the RX/TX_REQUEST_SELECT fields in the
51      ADMA_CHn_CTRL register.
52    const: 1
53
54required:
55  - compatible
56  - reg
57  - interrupts
58  - clocks
59  - clock-names
60
61additionalProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/interrupt-controller/arm-gic.h>
66    #include<dt-bindings/clock/tegra210-car.h>
67
68    dma-controller@702e2000 {
69        compatible = "nvidia,tegra210-adma";
70        reg = <0x702e2000 0x2000>;
71        interrupt-parent = <&tegra_agic>;
72        interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
73                     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
74                     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
75                     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
76                     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
77                     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
78                     <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
79                     <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
80                     <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
81                     <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
82                     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
83                     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
84                     <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
85                     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
86                     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
87                     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
88                     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
89                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
90                     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
91                     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
92                     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
93                     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
94        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
95        clock-names = "d_audio";
96        #dma-cells = <1>;
97    };
98
99...
100