1* MARVELL MMP DMA controller 2 3Marvell Peripheral DMA Controller 4Used platforms: pxa688, pxa910, pxa3xx, etc 5 6Required properties: 7- compatible: Should be "marvell,pdma-1.0" 8- reg: Should contain DMA registers location and length. 9- interrupts: Either contain all of the per-channel DMA interrupts 10 or one irq for pdma device 11 12Optional properties: 13- dma-channels: Number of DMA channels supported by the controller (defaults 14 to 32 when not specified) 15- #dma-channels: deprecated 16- dma-requests: Number of DMA requestor lines supported by the controller 17 (defaults to 32 when not specified) 18- #dma-requests: deprecated 19 20"marvell,pdma-1.0" 21Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688. 22 23Examples: 24 25/* 26 * Each channel has specific irq 27 * ICU parse out irq channel from ICU register, 28 * while DMA controller may not able to distinguish the irq channel 29 * Using this method, interrupt-parent is required as demuxer 30 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq, 31 * 18~21 is ADMA irq 32 */ 33pdma: dma-controller@d4000000 { 34 compatible = "marvell,pdma-1.0"; 35 reg = <0xd4000000 0x10000>; 36 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>; 37 interrupt-parent = <&intcmux32>; 38 dma-channels = <16>; 39 }; 40 41/* 42 * One irq for all channels 43 * Dmaengine driver (DMA controller) distinguish irq channel via 44 * parsing internal register 45 */ 46pdma: dma-controller@d4000000 { 47 compatible = "marvell,pdma-1.0"; 48 reg = <0xd4000000 0x10000>; 49 interrupts = <47>; 50 dma-channels = <16>; 51 }; 52 53 54Marvell Two Channel DMA Controller used specifically for audio 55Used platforms: pxa688, pxa910 56 57Required properties: 58- compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ" 59- reg: Should contain DMA registers location and length. 60- interrupts: Either contain all of the per-channel DMA interrupts 61 or one irq for dma device 62 63"marvell,adma-1.0" used on pxa688 64"marvell,pxa910-squ" used on pxa910 65 66Examples: 67 68/* each channel has specific irq */ 69adma0: dma-controller@d42a0800 { 70 compatible = "marvell,adma-1.0"; 71 reg = <0xd42a0800 0x100>; 72 interrupts = <18 19>; 73 interrupt-parent = <&intcmux32>; 74 }; 75 76/* One irq for all channels */ 77squ: dma-controller@d42a0800 { 78 compatible = "marvell,pxa910-squ"; 79 reg = <0xd42a0800 0x100>; 80 interrupts = <46>; 81 }; 82