1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
8
9maintainers:
10  - Vinod Koul <vkoul@kernel.org>
11
12allOf:
13  - $ref: "dma-controller.yaml#"
14
15# We need a select here so we don't match all nodes with 'arm,primecell'
16select:
17  properties:
18    compatible:
19      contains:
20        enum:
21          - arm,pl080
22          - arm,pl081
23  required:
24    - compatible
25
26properties:
27  compatible:
28    oneOf:
29      - items:
30          - enum:
31              - arm,pl080
32              - arm,pl081
33          - const: arm,primecell
34      - items:
35          - const: faraday,ftdma020
36          - const: arm,pl080
37          - const: arm,primecell
38
39  reg:
40    maxItems: 1
41    description: Address range of the PL08x registers
42
43  interrupts:
44    minItems: 1
45    description: The PL08x interrupt number
46
47  clocks:
48    minItems: 1
49    description: The clock running the IP core clock
50
51  clock-names:
52    maxItems: 1
53
54  lli-bus-interface-ahb1:
55    type: boolean
56    description: if AHB master 1 is eligible for fetching LLIs
57
58  lli-bus-interface-ahb2:
59    type: boolean
60    description: if AHB master 2 is eligible for fetching LLIs
61
62  mem-bus-interface-ahb1:
63    type: boolean
64    description: if AHB master 1 is eligible for fetching memory contents
65
66  mem-bus-interface-ahb2:
67    type: boolean
68    description: if AHB master 2 is eligible for fetching memory contents
69
70  memcpy-burst-size:
71    $ref: /schemas/types.yaml#/definitions/uint32
72    enum:
73      - 1
74      - 4
75      - 8
76      - 16
77      - 32
78      - 64
79      - 128
80      - 256
81    description: the size of the bursts for memcpy
82
83  memcpy-bus-width:
84    $ref: /schemas/types.yaml#/definitions/uint32
85    enum:
86      - 8
87      - 16
88      - 32
89      - 64
90    description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits
91
92required:
93  - reg
94  - interrupts
95  - clocks
96  - clock-names
97  - "#dma-cells"
98
99unevaluatedProperties: false
100
101examples:
102  - |
103    dmac0: dma-controller@10130000 {
104      compatible = "arm,pl080", "arm,primecell";
105      reg = <0x10130000 0x1000>;
106      interrupt-parent = <&vica>;
107      interrupts = <15>;
108      clocks = <&hclkdma0>;
109      clock-names = "apb_pclk";
110      lli-bus-interface-ahb1;
111      lli-bus-interface-ahb2;
112      mem-bus-interface-ahb2;
113      memcpy-burst-size = <256>;
114      memcpy-bus-width = <32>;
115      #dma-cells = <2>;
116    };
117  - |
118    #include <dt-bindings/interrupt-controller/irq.h>
119    #include <dt-bindings/reset/cortina,gemini-reset.h>
120    #include <dt-bindings/clock/cortina,gemini-clock.h>
121    dma-controller@67000000 {
122      compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
123      /* Faraday Technology FTDMAC020 variant */
124      arm,primecell-periphid = <0x0003b080>;
125      reg = <0x67000000 0x1000>;
126      interrupts = <9 IRQ_TYPE_EDGE_RISING>;
127      resets = <&syscon GEMINI_RESET_DMAC>;
128      clocks = <&syscon GEMINI_CLK_AHB>;
129      clock-names = "apb_pclk";
130      /* Bus interface AHB1 (AHB0) is totally tilted */
131      lli-bus-interface-ahb2;
132      mem-bus-interface-ahb2;
133      memcpy-burst-size = <256>;
134      memcpy-bus-width = <32>;
135      #dma-cells = <2>;
136    };
137