1fe90ced9SRameshwar Prasad SahuApplied Micro X-Gene SoC DMA nodes 2fe90ced9SRameshwar Prasad Sahu 3fe90ced9SRameshwar Prasad SahuDMA nodes are defined to describe on-chip DMA interfaces in 4fe90ced9SRameshwar Prasad SahuAPM X-Gene SoC. 5fe90ced9SRameshwar Prasad Sahu 6fe90ced9SRameshwar Prasad SahuRequired properties for DMA interfaces: 7fe90ced9SRameshwar Prasad Sahu- compatible: Should be "apm,xgene-dma". 8fe90ced9SRameshwar Prasad Sahu- device_type: set to "dma". 9fe90ced9SRameshwar Prasad Sahu- reg: Address and length of the register set for the device. 10fe90ced9SRameshwar Prasad Sahu It contains the information of registers in the following order: 11fe90ced9SRameshwar Prasad Sahu 1st - DMA control and status register address space. 12fe90ced9SRameshwar Prasad Sahu 2nd - Descriptor ring control and status register address space. 13fe90ced9SRameshwar Prasad Sahu 3rd - Descriptor ring command register address space. 14fe90ced9SRameshwar Prasad Sahu 4th - Soc efuse register address space. 15fe90ced9SRameshwar Prasad Sahu- interrupts: DMA has 5 interrupts sources. 1st interrupt is 16fe90ced9SRameshwar Prasad Sahu DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts 17fe90ced9SRameshwar Prasad Sahu are completion interrupts for each DMA channels. 18fe90ced9SRameshwar Prasad Sahu- clocks: Reference to the clock entry. 19fe90ced9SRameshwar Prasad Sahu 20fe90ced9SRameshwar Prasad SahuOptional properties: 21fe90ced9SRameshwar Prasad Sahu- dma-coherent : Present if dma operations are coherent 22fe90ced9SRameshwar Prasad Sahu 23fe90ced9SRameshwar Prasad SahuExample: 24fe90ced9SRameshwar Prasad Sahu dmaclk: dmaclk@1f27c000 { 25fe90ced9SRameshwar Prasad Sahu compatible = "apm,xgene-device-clock"; 26fe90ced9SRameshwar Prasad Sahu #clock-cells = <1>; 27fe90ced9SRameshwar Prasad Sahu clocks = <&socplldiv2 0>; 28fe90ced9SRameshwar Prasad Sahu reg = <0x0 0x1f27c000 0x0 0x1000>; 29fe90ced9SRameshwar Prasad Sahu reg-names = "csr-reg"; 30fe90ced9SRameshwar Prasad Sahu clock-output-names = "dmaclk"; 31fe90ced9SRameshwar Prasad Sahu }; 32fe90ced9SRameshwar Prasad Sahu 33fe90ced9SRameshwar Prasad Sahu dma: dma@1f270000 { 34fe90ced9SRameshwar Prasad Sahu compatible = "apm,xgene-storm-dma"; 35fe90ced9SRameshwar Prasad Sahu device_type = "dma"; 36fe90ced9SRameshwar Prasad Sahu reg = <0x0 0x1f270000 0x0 0x10000>, 37fe90ced9SRameshwar Prasad Sahu <0x0 0x1f200000 0x0 0x10000>, 38cda8e937SRameshwar Prasad Sahu <0x0 0x1b000000 0x0 0x400000>, 39fe90ced9SRameshwar Prasad Sahu <0x0 0x1054a000 0x0 0x100>; 40fe90ced9SRameshwar Prasad Sahu interrupts = <0x0 0x82 0x4>, 41fe90ced9SRameshwar Prasad Sahu <0x0 0xb8 0x4>, 42fe90ced9SRameshwar Prasad Sahu <0x0 0xb9 0x4>, 43fe90ced9SRameshwar Prasad Sahu <0x0 0xba 0x4>, 44fe90ced9SRameshwar Prasad Sahu <0x0 0xbb 0x4>; 45fe90ced9SRameshwar Prasad Sahu dma-coherent; 46fe90ced9SRameshwar Prasad Sahu clocks = <&dmaclk 0>; 47fe90ced9SRameshwar Prasad Sahu }; 48