1Device-Tree bindings for tilcdc DRM generic panel output driver
2
3Required properties:
4 - compatible: value should be "ti,tilcdc,panel".
5 - panel-info: configuration info to configure LCDC correctly for the panel
6   - ac-bias: AC Bias Pin Frequency
7   - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
8   - dma-burst-sz: DMA burst size
9   - bpp: Bits per pixel
10   - fdd: FIFO DMA Request Delay
11   - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
12   - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
13   - raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most
14   - fifo-th: DMA FIFO threshold
15 - display-timings: typical videomode of lcd panel.  Multiple video modes
16   can be listed if the panel supports multiple timings, but the 'native-mode'
17   should be the preferred/default resolution.  Refer to
18   Documentation/devicetree/bindings/display/panel/display-timing.txt for display
19   timing binding details.
20
21Optional properties:
22- backlight: phandle of the backlight device attached to the panel
23- enable-gpios: GPIO pin to enable or disable the panel
24
25Recommended properties:
26 - pinctrl-names, pinctrl-0: the pincontrol settings to configure
27   muxing properly for pins that connect to TFP410 device
28
29Example:
30
31	/* Settings for CDTech_S035Q01 / LCD3 cape: */
32	lcd3 {
33		compatible = "ti,tilcdc,panel";
34		pinctrl-names = "default";
35		pinctrl-0 = <&bone_lcd3_cape_lcd_pins>;
36		backlight = <&backlight>;
37		enable-gpios = <&gpio3 19 0>;
38
39		panel-info {
40			ac-bias           = <255>;
41			ac-bias-intrpt    = <0>;
42			dma-burst-sz      = <16>;
43			bpp               = <16>;
44			fdd               = <0x80>;
45			sync-edge         = <0>;
46			sync-ctrl         = <1>;
47			raster-order      = <0>;
48			fifo-th           = <0>;
49		};
50		display-timings {
51			native-mode = <&timing0>;
52			timing0: 320x240 {
53				hactive         = <320>;
54				vactive         = <240>;
55				hback-porch     = <21>;
56				hfront-porch    = <58>;
57				hsync-len       = <47>;
58				vback-porch     = <11>;
59				vfront-porch    = <23>;
60				vsync-len       = <2>;
61				clock-frequency = <8000000>;
62				hsync-active    = <0>;
63				vsync-active    = <0>;
64			};
65		};
66	};
67