19ad676e5SJyri Sarha# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
29ad676e5SJyri Sarha# Copyright 2019 Texas Instruments Incorporated
39ad676e5SJyri Sarha%YAML 1.2
49ad676e5SJyri Sarha---
59ad676e5SJyri Sarha$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
69ad676e5SJyri Sarha$schema: "http://devicetree.org/meta-schemas/core.yaml#"
79ad676e5SJyri Sarha
89ad676e5SJyri Sarhatitle: Texas Instruments K2G Display Subsystem
99ad676e5SJyri Sarha
109ad676e5SJyri Sarhamaintainers:
119ad676e5SJyri Sarha  - Jyri Sarha <jsarha@ti.com>
129ad676e5SJyri Sarha  - Tomi Valkeinen <tomi.valkeinen@ti.com>
139ad676e5SJyri Sarha
149ad676e5SJyri Sarhadescription: |
159ad676e5SJyri Sarha  The K2G DSS is an ultra-light version of TI Keystone Display
169ad676e5SJyri Sarha  SubSystem. It has only one output port and video plane. The
179ad676e5SJyri Sarha  output is DPI.
189ad676e5SJyri Sarha
199ad676e5SJyri Sarhaproperties:
209ad676e5SJyri Sarha  compatible:
219ad676e5SJyri Sarha    const: ti,k2g-dss
229ad676e5SJyri Sarha
239ad676e5SJyri Sarha  reg:
249ad676e5SJyri Sarha    items:
259ad676e5SJyri Sarha      - description: cfg DSS top level
269ad676e5SJyri Sarha      - description: common DISPC common
279ad676e5SJyri Sarha      - description: VID1 video plane 1
289ad676e5SJyri Sarha      - description: OVR1 overlay manager for vp1
299ad676e5SJyri Sarha      - description: VP1 video port 1
309ad676e5SJyri Sarha
319ad676e5SJyri Sarha  reg-names:
329ad676e5SJyri Sarha    items:
339ad676e5SJyri Sarha      - const: cfg
349ad676e5SJyri Sarha      - const: common
359ad676e5SJyri Sarha      - const: vid1
369ad676e5SJyri Sarha      - const: ovr1
379ad676e5SJyri Sarha      - const: vp1
389ad676e5SJyri Sarha
399ad676e5SJyri Sarha  clocks:
409ad676e5SJyri Sarha    items:
419ad676e5SJyri Sarha      - description: fck DSS functional clock
429ad676e5SJyri Sarha      - description: vp1 Video Port 1 pixel clock
439ad676e5SJyri Sarha
449ad676e5SJyri Sarha  clock-names:
459ad676e5SJyri Sarha    items:
469ad676e5SJyri Sarha      - const: fck
479ad676e5SJyri Sarha      - const: vp1
489ad676e5SJyri Sarha
499ad676e5SJyri Sarha  interrupts:
509ad676e5SJyri Sarha    maxItems: 1
519ad676e5SJyri Sarha
529ad676e5SJyri Sarha  power-domains:
539ad676e5SJyri Sarha    maxItems: 1
549ad676e5SJyri Sarha    description: phandle to the associated power domain
559ad676e5SJyri Sarha
569ad676e5SJyri Sarha  port:
57*b6755423SRob Herring    $ref: /schemas/graph.yaml#/properties/port
589ad676e5SJyri Sarha    description:
599ad676e5SJyri Sarha      The DSS DPI output port node
609ad676e5SJyri Sarha
619ad676e5SJyri Sarha  max-memory-bandwidth:
629ad676e5SJyri Sarha    $ref: /schemas/types.yaml#/definitions/uint32
639ad676e5SJyri Sarha    description:
649ad676e5SJyri Sarha      Input memory (from main memory to dispc) bandwidth limit in
659ad676e5SJyri Sarha      bytes per second
669ad676e5SJyri Sarha
679ad676e5SJyri Sarharequired:
689ad676e5SJyri Sarha  - compatible
699ad676e5SJyri Sarha  - reg
709ad676e5SJyri Sarha  - reg-names
719ad676e5SJyri Sarha  - clocks
729ad676e5SJyri Sarha  - clock-names
739ad676e5SJyri Sarha  - interrupts
749ad676e5SJyri Sarha  - port
759ad676e5SJyri Sarha
769ad676e5SJyri SarhaadditionalProperties: false
779ad676e5SJyri Sarha
789ad676e5SJyri Sarhaexamples:
799ad676e5SJyri Sarha  - |
809ad676e5SJyri Sarha    #include <dt-bindings/interrupt-controller/arm-gic.h>
819ad676e5SJyri Sarha    #include <dt-bindings/interrupt-controller/irq.h>
829ad676e5SJyri Sarha
8398878d9dSRob Herring    dss: dss@2540000 {
849ad676e5SJyri Sarha            compatible = "ti,k2g-dss";
859ad676e5SJyri Sarha            reg =   <0x02540000 0x400>,
869ad676e5SJyri Sarha                    <0x02550000 0x1000>,
879ad676e5SJyri Sarha                    <0x02557000 0x1000>,
889ad676e5SJyri Sarha                    <0x0255a800 0x100>,
899ad676e5SJyri Sarha                    <0x0255ac00 0x100>;
909ad676e5SJyri Sarha            reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
919ad676e5SJyri Sarha            clocks =        <&k2g_clks 0x2 0>,
929ad676e5SJyri Sarha                            <&k2g_clks 0x2 1>;
939ad676e5SJyri Sarha            clock-names = "fck", "vp1";
949ad676e5SJyri Sarha            interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
959ad676e5SJyri Sarha
969ad676e5SJyri Sarha            power-domains = <&k2g_pds 0x2>;
979ad676e5SJyri Sarha
989ad676e5SJyri Sarha            max-memory-bandwidth = <230000000>;
999ad676e5SJyri Sarha
1009ad676e5SJyri Sarha            port {
1019ad676e5SJyri Sarha                    dpi_out: endpoint {
1029ad676e5SJyri Sarha                            remote-endpoint = <&sii9022_in>;
1039ad676e5SJyri Sarha                    };
1049ad676e5SJyri Sarha            };
1059ad676e5SJyri Sarha    };
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