1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra HDMI Output Encoder
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14  $nodename:
15    pattern: "^hdmi@[0-9a-f]+$"
16
17  compatible:
18    oneOf:
19      - enum:
20          - nvidia,tegra20-hdmi
21          - nvidia,tegra30-hdmi
22          - nvidia,tegra114-hdmi
23          - nvidia,tegra124-hdmi
24
25      - items:
26          - const: nvidia,tegra132-hdmi
27          - const: nvidia,tegra124-hdmi
28
29  reg:
30    maxItems: 1
31
32  interrupts:
33    maxItems: 1
34
35  clocks:
36    items:
37      - description: module clock
38      - description: parent clock
39
40  clock-names:
41    items:
42      - const: hdmi
43      - const: parent
44
45  resets:
46    items:
47      - description: module reset
48
49  reset-names:
50    items:
51      - const: hdmi
52
53  operating-points-v2:
54    $ref: "/schemas/types.yaml#/definitions/phandle"
55
56  power-domains:
57    items:
58      - description: phandle to the core power domain
59
60  hdmi-supply:
61    description: supply for the +5V HDMI connector pin
62
63  vdd-supply:
64    description: regulator for supply voltage
65
66  pll-supply:
67    description: regulator for PLL
68
69  nvidia,ddc-i2c-bus:
70    description: phandle of an I2C controller used for DDC EDID
71      probing
72    $ref: "/schemas/types.yaml#/definitions/phandle"
73
74  nvidia,hpd-gpio:
75    description: specifies a GPIO used for hotplug detection
76    maxItems: 1
77
78  nvidia,edid:
79    description: supplies a binary EDID blob
80    $ref: "/schemas/types.yaml#/definitions/uint8-array"
81
82  nvidia,panel:
83    description: phandle of a display panel
84    $ref: "/schemas/types.yaml#/definitions/phandle"
85
86  "#sound-dai-cells":
87    const: 0
88
89additionalProperties: false
90
91required:
92  - compatible
93  - reg
94  - interrupts
95  - clocks
96  - clock-names
97  - resets
98  - reset-names
99  - pll-supply
100  - vdd-supply
101  - nvidia,ddc-i2c-bus
102  - nvidia,hpd-gpio
103
104examples:
105  - |
106    #include <dt-bindings/clock/tegra124-car.h>
107    #include <dt-bindings/interrupt-controller/arm-gic.h>
108    #include <dt-bindings/gpio/tegra-gpio.h>
109
110    hdmi@54280000 {
111        compatible = "nvidia,tegra124-hdmi";
112        reg = <0x54280000 0x00040000>;
113        interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
114        clocks = <&tegra_car TEGRA124_CLK_HDMI>,
115                 <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>;
116        clock-names = "hdmi", "parent";
117        resets = <&tegra_car 51>;
118        reset-names = "hdmi";
119
120        hdmi-supply = <&vdd_5v0_hdmi>;
121        pll-supply = <&vdd_hdmi_pll>;
122        vdd-supply = <&vdd_3v3_hdmi>;
123
124        nvidia,ddc-i2c-bus = <&hdmi_ddc>;
125        nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
126    };
127