1*fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*fe8b45aaSThierry Reding%YAML 1.2 3*fe8b45aaSThierry Reding--- 4*fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml# 5*fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6*fe8b45aaSThierry Reding 7*fe8b45aaSThierry Redingtitle: NVIDIA Tegra MIPI pad calibration controller 8*fe8b45aaSThierry Reding 9*fe8b45aaSThierry Redingmaintainers: 10*fe8b45aaSThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11*fe8b45aaSThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12*fe8b45aaSThierry Reding 13*fe8b45aaSThierry Redingproperties: 14*fe8b45aaSThierry Reding $nodename: 15*fe8b45aaSThierry Reding pattern: "^mipi@[0-9a-f]+$" 16*fe8b45aaSThierry Reding 17*fe8b45aaSThierry Reding compatible: 18*fe8b45aaSThierry Reding enum: 19*fe8b45aaSThierry Reding - nvidia,tegra114-mipi 20*fe8b45aaSThierry Reding - nvidia,tegra210-mipi 21*fe8b45aaSThierry Reding - nvidia,tegra186-mipi 22*fe8b45aaSThierry Reding 23*fe8b45aaSThierry Reding reg: 24*fe8b45aaSThierry Reding maxItems: 1 25*fe8b45aaSThierry Reding 26*fe8b45aaSThierry Reding clocks: 27*fe8b45aaSThierry Reding items: 28*fe8b45aaSThierry Reding - description: module clock 29*fe8b45aaSThierry Reding 30*fe8b45aaSThierry Reding clock-names: 31*fe8b45aaSThierry Reding items: 32*fe8b45aaSThierry Reding - const: mipi-cal 33*fe8b45aaSThierry Reding 34*fe8b45aaSThierry Reding power-domains: 35*fe8b45aaSThierry Reding maxItems: 1 36*fe8b45aaSThierry Reding 37*fe8b45aaSThierry Reding "#nvidia,mipi-calibrate-cells": 38*fe8b45aaSThierry Reding description: The number of cells in a MIPI calibration specifier. 39*fe8b45aaSThierry Reding Should be 1. The single cell specifies a bitmask of the pads that 40*fe8b45aaSThierry Reding need to be calibrated for a given device. 41*fe8b45aaSThierry Reding $ref: "/schemas/types.yaml#/definitions/uint32" 42*fe8b45aaSThierry Reding const: 1 43*fe8b45aaSThierry Reding 44*fe8b45aaSThierry RedingadditionalProperties: false 45*fe8b45aaSThierry Reding 46*fe8b45aaSThierry Redingrequired: 47*fe8b45aaSThierry Reding - compatible 48*fe8b45aaSThierry Reding - reg 49*fe8b45aaSThierry Reding - clocks 50*fe8b45aaSThierry Reding - "#nvidia,mipi-calibrate-cells" 51*fe8b45aaSThierry Reding 52*fe8b45aaSThierry Redingexamples: 53*fe8b45aaSThierry Reding - | 54*fe8b45aaSThierry Reding #include <dt-bindings/clock/tegra114-car.h> 55*fe8b45aaSThierry Reding 56*fe8b45aaSThierry Reding mipi@700e3000 { 57*fe8b45aaSThierry Reding compatible = "nvidia,tegra114-mipi"; 58*fe8b45aaSThierry Reding reg = <0x700e3000 0x100>; 59*fe8b45aaSThierry Reding clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; 60*fe8b45aaSThierry Reding clock-names = "mipi-cal"; 61*fe8b45aaSThierry Reding #nvidia,mipi-calibrate-cells = <1>; 62*fe8b45aaSThierry Reding }; 63*fe8b45aaSThierry Reding 64*fe8b45aaSThierry Reding dsia: dsi@54300000 { 65*fe8b45aaSThierry Reding compatible = "nvidia,tegra114-dsi"; 66*fe8b45aaSThierry Reding reg = <0x54300000 0x00040000>; 67*fe8b45aaSThierry Reding clocks = <&tegra_car TEGRA114_CLK_DSIA>, 68*fe8b45aaSThierry Reding <&tegra_car TEGRA114_CLK_DSIALP>, 69*fe8b45aaSThierry Reding <&tegra_car TEGRA114_CLK_PLL_D_OUT0>; 70*fe8b45aaSThierry Reding clock-names = "dsi", "lp", "parent"; 71*fe8b45aaSThierry Reding resets = <&tegra_car 48>; 72*fe8b45aaSThierry Reding reset-names = "dsi"; 73*fe8b45aaSThierry Reding nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */ 74*fe8b45aaSThierry Reding }; 75